tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer
7 * Copyright (C) 2005 Maciej W. Rozycki
8 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved.
10 */
11
12#include <linux/types.h>
13
14#ifdef CONFIG_EXPORT_UASM
15#include <linux/export.h>
16#define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)
17#else
18#define UASM_EXPORT_SYMBOL(sym)
19#endif
20
21#define _UASM_ISA_CLASSIC 0
22#define _UASM_ISA_MICROMIPS 1
23
24#ifndef UASM_ISA
25#ifdef CONFIG_CPU_MICROMIPS
26#define UASM_ISA _UASM_ISA_MICROMIPS
27#else
28#define UASM_ISA _UASM_ISA_CLASSIC
29#endif
30#endif
31
32#if (UASM_ISA == _UASM_ISA_CLASSIC)
33#ifdef CONFIG_CPU_MICROMIPS
34#define ISAOPC(op) CL_uasm_i##op
35#define ISAFUNC(x) CL_##x
36#else
37#define ISAOPC(op) uasm_i##op
38#define ISAFUNC(x) x
39#endif
40#elif (UASM_ISA == _UASM_ISA_MICROMIPS)
41#ifdef CONFIG_CPU_MICROMIPS
42#define ISAOPC(op) uasm_i##op
43#define ISAFUNC(x) x
44#else
45#define ISAOPC(op) MM_uasm_i##op
46#define ISAFUNC(x) MM_##x
47#endif
48#else
49#error Unsupported micro-assembler ISA!!!
50#endif
51
52#define Ip_u1u2u3(op) \
53void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
54
55#define Ip_u2u1u3(op) \
56void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
57
58#define Ip_u3u2u1(op) \
59void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
60
61#define Ip_u3u1u2(op) \
62void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
63
64#define Ip_u1u2s3(op) \
65void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
66
67#define Ip_u2s3u1(op) \
68void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
69
70#define Ip_s3s1s2(op) \
71void ISAOPC(op)(u32 **buf, int a, int b, int c)
72
73#define Ip_u2u1s3(op) \
74void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
75
76#define Ip_u2u1msbu3(op) \
77void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \
78 unsigned int d)
79
80#define Ip_u1u2(op) \
81void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
82
83#define Ip_u2u1(op) \
84void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
85
86#define Ip_u1s2(op) \
87void ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
88
89#define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a)
90
91#define Ip_0(op) void ISAOPC(op)(u32 **buf)
92
93Ip_u2u1s3(_addiu);
94Ip_u3u1u2(_addu);
95Ip_u3u1u2(_and);
96Ip_u2u1u3(_andi);
97Ip_u1u2s3(_bbit0);
98Ip_u1u2s3(_bbit1);
99Ip_u1u2s3(_beq);
100Ip_u1u2s3(_beql);
101Ip_u1s2(_bgez);
102Ip_u1s2(_bgezl);
103Ip_u1s2(_bltz);
104Ip_u1s2(_bltzl);
105Ip_u1u2s3(_bne);
106Ip_u2s3u1(_cache);
107Ip_u2u1s3(_daddiu);
108Ip_u3u1u2(_daddu);
109Ip_u2u1msbu3(_dins);
110Ip_u2u1msbu3(_dinsm);
111Ip_u1u2(_divu);
112Ip_u1u2u3(_dmfc0);
113Ip_u1u2u3(_dmtc0);
114Ip_u2u1u3(_drotr);
115Ip_u2u1u3(_drotr32);
116Ip_u2u1u3(_dsll);
117Ip_u2u1u3(_dsll32);
118Ip_u2u1u3(_dsra);
119Ip_u2u1u3(_dsrl);
120Ip_u2u1u3(_dsrl32);
121Ip_u3u1u2(_dsubu);
122Ip_0(_eret);
123Ip_u2u1msbu3(_ext);
124Ip_u2u1msbu3(_ins);
125Ip_u1(_j);
126Ip_u1(_jal);
127Ip_u2u1(_jalr);
128Ip_u1(_jr);
129Ip_u2s3u1(_lb);
130Ip_u2s3u1(_ld);
131Ip_u3u1u2(_ldx);
132Ip_u2s3u1(_lh);
133Ip_u2s3u1(_ll);
134Ip_u2s3u1(_lld);
135Ip_u1s2(_lui);
136Ip_u2s3u1(_lw);
137Ip_u3u1u2(_lwx);
138Ip_u1u2u3(_mfc0);
139Ip_u1u2u3(_mfhc0);
140Ip_u1(_mfhi);
141Ip_u1(_mflo);
142Ip_u1u2u3(_mtc0);
143Ip_u1u2u3(_mthc0);
144Ip_u3u1u2(_mul);
145Ip_u3u1u2(_or);
146Ip_u2u1u3(_ori);
147Ip_u2s3u1(_pref);
148Ip_0(_rfe);
149Ip_u2u1u3(_rotr);
150Ip_u2s3u1(_sc);
151Ip_u2s3u1(_scd);
152Ip_u2s3u1(_sd);
153Ip_u2u1u3(_sll);
154Ip_u3u2u1(_sllv);
155Ip_s3s1s2(_slt);
156Ip_u2u1s3(_sltiu);
157Ip_u3u1u2(_sltu);
158Ip_u2u1u3(_sra);
159Ip_u2u1u3(_srl);
160Ip_u3u2u1(_srlv);
161Ip_u3u1u2(_subu);
162Ip_u2s3u1(_sw);
163Ip_u1(_sync);
164Ip_u1(_syscall);
165Ip_0(_tlbp);
166Ip_0(_tlbr);
167Ip_0(_tlbwi);
168Ip_0(_tlbwr);
169Ip_u1(_wait);
170Ip_u2u1(_wsbh);
171Ip_u3u1u2(_xor);
172Ip_u2u1u3(_xori);
173Ip_u2u1(_yield);
174Ip_u1u2(_ldpte);
175Ip_u2u1u3(_lddir);
176
177/* Handle labels. */
178struct uasm_label {
179 u32 *addr;
180 int lab;
181};
182
183void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
184 int lid);
185#ifdef CONFIG_64BIT
186int ISAFUNC(uasm_in_compat_space_p)(long addr);
187#endif
188int ISAFUNC(uasm_rel_hi)(long val);
189int ISAFUNC(uasm_rel_lo)(long val);
190void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr);
191void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);
192
193#define UASM_L_LA(lb) \
194static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \
195{ \
196 ISAFUNC(uasm_build_label)(lab, addr, label##lb); \
197}
198
199/* convenience macros for instructions */
200#ifdef CONFIG_64BIT
201# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val)
202# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd)
203# define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
204# define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off)
205# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
206# define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
207# define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
208# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
209# define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
210# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
211# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
212# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
213# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
214# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
215# define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off)
216#else
217# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val)
218# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd)
219# define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
220# define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
221# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
222# define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
223# define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
224# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
225# define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
226# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
227# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
228# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
229# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
230# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
231# define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
232#endif
233
234#define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
235#define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off)
236#define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off)
237#define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off)
238#define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
239#define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
240#define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
241#define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
242#define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
243
244static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
245 unsigned int a2, unsigned int a3)
246{
247 if (a3 < 32)
248 ISAOPC(_drotr)(p, a1, a2, a3);
249 else
250 ISAOPC(_drotr32)(p, a1, a2, a3 - 32);
251}
252
253static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1,
254 unsigned int a2, unsigned int a3)
255{
256 if (a3 < 32)
257 ISAOPC(_dsll)(p, a1, a2, a3);
258 else
259 ISAOPC(_dsll32)(p, a1, a2, a3 - 32);
260}
261
262static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1,
263 unsigned int a2, unsigned int a3)
264{
265 if (a3 < 32)
266 ISAOPC(_dsrl)(p, a1, a2, a3);
267 else
268 ISAOPC(_dsrl32)(p, a1, a2, a3 - 32);
269}
270
271/* Handle relocations. */
272struct uasm_reloc {
273 u32 *addr;
274 unsigned int type;
275 int lab;
276};
277
278/* This is zero so we can use zeroed label arrays. */
279#define UASM_LABEL_INVALID 0
280
281void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid);
282void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab);
283void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off);
284void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off);
285void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab,
286 u32 *first, u32 *end, u32 *target);
287int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr);
288
289/* Convenience functions for labeled branches. */
290void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid);
291void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg,
292 unsigned int bit, int lid);
293void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg,
294 unsigned int bit, int lid);
295void uasm_il_beq(u32 **p, struct uasm_reloc **r, unsigned int r1,
296 unsigned int r2, int lid);
297void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
298void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
299void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
300void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
301void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
302void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1,
303 unsigned int reg2, int lid);
304void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);