tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1#ifndef _ASM_IO_H
2#define _ASM_IO_H
3
4#include <linux/types.h>
5#include <asm/pgtable.h>
6
7#define virt_to_phys(a) ((unsigned long)__pa(a))
8#define phys_to_virt(a) __va(a)
9#define virt_to_bus virt_to_phys
10#define bus_to_virt phys_to_virt
11
12static inline unsigned long isa_bus_to_virt(unsigned long addr) {
13 BUG();
14 return 0;
15}
16
17static inline unsigned long isa_virt_to_bus(void *addr) {
18 BUG();
19 return 0;
20}
21
22/*
23 * Memory mapped I/O
24 *
25 * readX()/writeX() do byteswapping and take an ioremapped address
26 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
27 * gsc_*() don't byteswap and operate on physical addresses;
28 * eg dev->hpa or 0xfee00000.
29 */
30
31static inline unsigned char gsc_readb(unsigned long addr)
32{
33 long flags;
34 unsigned char ret;
35
36 __asm__ __volatile__(
37 " rsm 2,%0\n"
38 " ldbx 0(%2),%1\n"
39 " mtsm %0\n"
40 : "=&r" (flags), "=r" (ret) : "r" (addr) );
41
42 return ret;
43}
44
45static inline unsigned short gsc_readw(unsigned long addr)
46{
47 long flags;
48 unsigned short ret;
49
50 __asm__ __volatile__(
51 " rsm 2,%0\n"
52 " ldhx 0(%2),%1\n"
53 " mtsm %0\n"
54 : "=&r" (flags), "=r" (ret) : "r" (addr) );
55
56 return ret;
57}
58
59static inline unsigned int gsc_readl(unsigned long addr)
60{
61 u32 ret;
62
63 __asm__ __volatile__(
64 " ldwax 0(%1),%0\n"
65 : "=r" (ret) : "r" (addr) );
66
67 return ret;
68}
69
70static inline unsigned long long gsc_readq(unsigned long addr)
71{
72 unsigned long long ret;
73
74#ifdef CONFIG_64BIT
75 __asm__ __volatile__(
76 " ldda 0(%1),%0\n"
77 : "=r" (ret) : "r" (addr) );
78#else
79 /* two reads may have side effects.. */
80 ret = ((u64) gsc_readl(addr)) << 32;
81 ret |= gsc_readl(addr+4);
82#endif
83 return ret;
84}
85
86static inline void gsc_writeb(unsigned char val, unsigned long addr)
87{
88 long flags;
89 __asm__ __volatile__(
90 " rsm 2,%0\n"
91 " stbs %1,0(%2)\n"
92 " mtsm %0\n"
93 : "=&r" (flags) : "r" (val), "r" (addr) );
94}
95
96static inline void gsc_writew(unsigned short val, unsigned long addr)
97{
98 long flags;
99 __asm__ __volatile__(
100 " rsm 2,%0\n"
101 " sths %1,0(%2)\n"
102 " mtsm %0\n"
103 : "=&r" (flags) : "r" (val), "r" (addr) );
104}
105
106static inline void gsc_writel(unsigned int val, unsigned long addr)
107{
108 __asm__ __volatile__(
109 " stwas %0,0(%1)\n"
110 : : "r" (val), "r" (addr) );
111}
112
113static inline void gsc_writeq(unsigned long long val, unsigned long addr)
114{
115#ifdef CONFIG_64BIT
116 __asm__ __volatile__(
117 " stda %0,0(%1)\n"
118 : : "r" (val), "r" (addr) );
119#else
120 /* two writes may have side effects.. */
121 gsc_writel(val >> 32, addr);
122 gsc_writel(val, addr+4);
123#endif
124}
125
126/*
127 * The standard PCI ioremap interfaces
128 */
129
130extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
131
132/* Most machines react poorly to I/O-space being cacheable... Instead let's
133 * define ioremap() in terms of ioremap_nocache().
134 */
135static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
136{
137 return __ioremap(offset, size, _PAGE_NO_CACHE);
138}
139#define ioremap_nocache(off, sz) ioremap((off), (sz))
140#define ioremap_wc ioremap_nocache
141#define ioremap_uc ioremap_nocache
142
143extern void iounmap(const volatile void __iomem *addr);
144
145static inline unsigned char __raw_readb(const volatile void __iomem *addr)
146{
147 return (*(volatile unsigned char __force *) (addr));
148}
149static inline unsigned short __raw_readw(const volatile void __iomem *addr)
150{
151 return *(volatile unsigned short __force *) addr;
152}
153static inline unsigned int __raw_readl(const volatile void __iomem *addr)
154{
155 return *(volatile unsigned int __force *) addr;
156}
157static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
158{
159 return *(volatile unsigned long long __force *) addr;
160}
161
162static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
163{
164 *(volatile unsigned char __force *) addr = b;
165}
166static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
167{
168 *(volatile unsigned short __force *) addr = b;
169}
170static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
171{
172 *(volatile unsigned int __force *) addr = b;
173}
174static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
175{
176 *(volatile unsigned long long __force *) addr = b;
177}
178
179static inline unsigned char readb(const volatile void __iomem *addr)
180{
181 return __raw_readb(addr);
182}
183static inline unsigned short readw(const volatile void __iomem *addr)
184{
185 return le16_to_cpu(__raw_readw(addr));
186}
187static inline unsigned int readl(const volatile void __iomem *addr)
188{
189 return le32_to_cpu(__raw_readl(addr));
190}
191static inline unsigned long long readq(const volatile void __iomem *addr)
192{
193 return le64_to_cpu(__raw_readq(addr));
194}
195
196static inline void writeb(unsigned char b, volatile void __iomem *addr)
197{
198 __raw_writeb(b, addr);
199}
200static inline void writew(unsigned short w, volatile void __iomem *addr)
201{
202 __raw_writew(cpu_to_le16(w), addr);
203}
204static inline void writel(unsigned int l, volatile void __iomem *addr)
205{
206 __raw_writel(cpu_to_le32(l), addr);
207}
208static inline void writeq(unsigned long long q, volatile void __iomem *addr)
209{
210 __raw_writeq(cpu_to_le64(q), addr);
211}
212
213#define readb readb
214#define readw readw
215#define readl readl
216#define readq readq
217#define writeb writeb
218#define writew writew
219#define writel writel
220#define writeq writeq
221
222#define readb_relaxed(addr) readb(addr)
223#define readw_relaxed(addr) readw(addr)
224#define readl_relaxed(addr) readl(addr)
225#define readq_relaxed(addr) readq(addr)
226#define writeb_relaxed(b, addr) writeb(b, addr)
227#define writew_relaxed(w, addr) writew(w, addr)
228#define writel_relaxed(l, addr) writel(l, addr)
229#define writeq_relaxed(q, addr) writeq(q, addr)
230
231#define mmiowb() do { } while (0)
232
233void memset_io(volatile void __iomem *addr, unsigned char val, int count);
234void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
235void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
236
237/* Port-space IO */
238
239#define inb_p inb
240#define inw_p inw
241#define inl_p inl
242#define outb_p outb
243#define outw_p outw
244#define outl_p outl
245
246extern unsigned char eisa_in8(unsigned short port);
247extern unsigned short eisa_in16(unsigned short port);
248extern unsigned int eisa_in32(unsigned short port);
249extern void eisa_out8(unsigned char data, unsigned short port);
250extern void eisa_out16(unsigned short data, unsigned short port);
251extern void eisa_out32(unsigned int data, unsigned short port);
252
253#if defined(CONFIG_PCI)
254extern unsigned char inb(int addr);
255extern unsigned short inw(int addr);
256extern unsigned int inl(int addr);
257
258extern void outb(unsigned char b, int addr);
259extern void outw(unsigned short b, int addr);
260extern void outl(unsigned int b, int addr);
261#elif defined(CONFIG_EISA)
262#define inb eisa_in8
263#define inw eisa_in16
264#define inl eisa_in32
265#define outb eisa_out8
266#define outw eisa_out16
267#define outl eisa_out32
268#else
269static inline char inb(unsigned long addr)
270{
271 BUG();
272 return -1;
273}
274
275static inline short inw(unsigned long addr)
276{
277 BUG();
278 return -1;
279}
280
281static inline int inl(unsigned long addr)
282{
283 BUG();
284 return -1;
285}
286
287#define outb(x, y) BUG()
288#define outw(x, y) BUG()
289#define outl(x, y) BUG()
290#endif
291
292/*
293 * String versions of in/out ops:
294 */
295extern void insb (unsigned long port, void *dst, unsigned long count);
296extern void insw (unsigned long port, void *dst, unsigned long count);
297extern void insl (unsigned long port, void *dst, unsigned long count);
298extern void outsb (unsigned long port, const void *src, unsigned long count);
299extern void outsw (unsigned long port, const void *src, unsigned long count);
300extern void outsl (unsigned long port, const void *src, unsigned long count);
301
302
303/* IO Port space is : BBiiii where BB is HBA number. */
304#define IO_SPACE_LIMIT 0x00ffffff
305
306/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
307 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
308 * mode (essentially just sign extending. This macro takes in a 32
309 * bit I/O address (still with the leading f) and outputs the correct
310 * value for either 32 or 64 bit mode */
311#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
312
313#include <asm-generic/iomap.h>
314
315/*
316 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
317 * access
318 */
319#define xlate_dev_mem_ptr(p) __va(p)
320
321/*
322 * Convert a virtual cached pointer to an uncached pointer
323 */
324#define xlate_dev_kmem_ptr(p) p
325
326#endif