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1/* 2 * Device Tree Source for the SILK board 3 * 4 * Copyright (C) 2014 Renesas Electronics Corporation 5 * Copyright (C) 2014-2015 Renesas Solutions Corp. 6 * Copyright (C) 2014-2015 Cogent Embedded, Inc. 7 * 8 * This file is licensed under the terms of the GNU General Public License 9 * version 2. This program is licensed "as is" without any warranty of any 10 * kind, whether express or implied. 11 */ 12 13/dts-v1/; 14#include "r8a7794.dtsi" 15#include <dt-bindings/gpio/gpio.h> 16 17/ { 18 model = "SILK"; 19 compatible = "renesas,silk", "renesas,r8a7794"; 20 21 aliases { 22 serial0 = &scif2; 23 }; 24 25 chosen { 26 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; 27 stdout-path = "serial0:115200n8"; 28 }; 29 30 memory@40000000 { 31 device_type = "memory"; 32 reg = <0 0x40000000 0 0x40000000>; 33 }; 34 35 d3_3v: regulator@0 { 36 compatible = "regulator-fixed"; 37 regulator-name = "D3.3V"; 38 regulator-min-microvolt = <3300000>; 39 regulator-max-microvolt = <3300000>; 40 regulator-boot-on; 41 regulator-always-on; 42 }; 43 44 vcc_sdhi1: regulator@3 { 45 compatible = "regulator-fixed"; 46 47 regulator-name = "SDHI1 Vcc"; 48 regulator-min-microvolt = <3300000>; 49 regulator-max-microvolt = <3300000>; 50 51 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; 52 enable-active-high; 53 }; 54 55 vccq_sdhi1: regulator@4 { 56 compatible = "regulator-gpio"; 57 58 regulator-name = "SDHI1 VccQ"; 59 regulator-min-microvolt = <1800000>; 60 regulator-max-microvolt = <3300000>; 61 62 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; 63 gpios-states = <1>; 64 states = <3300000 1 65 1800000 0>; 66 }; 67 68 vga-encoder { 69 compatible = "adi,adv7123"; 70 71 ports { 72 #address-cells = <1>; 73 #size-cells = <0>; 74 75 port@0 { 76 reg = <0>; 77 adv7123_in: endpoint { 78 remote-endpoint = <&du_out_rgb1>; 79 }; 80 }; 81 port@1 { 82 reg = <1>; 83 adv7123_out: endpoint { 84 remote-endpoint = <&vga_in>; 85 }; 86 }; 87 }; 88 }; 89 90 hdmi-out { 91 compatible = "hdmi-connector"; 92 type = "a"; 93 94 port { 95 hdmi_con: endpoint { 96 remote-endpoint = <&adv7511_out>; 97 }; 98 }; 99 }; 100 101 vga { 102 compatible = "vga-connector"; 103 104 port { 105 vga_in: endpoint { 106 remote-endpoint = <&adv7123_out>; 107 }; 108 }; 109 }; 110 111 x2_clk: x2-clock { 112 compatible = "fixed-clock"; 113 #clock-cells = <0>; 114 clock-frequency = <148500000>; 115 }; 116 117 x3_clk: x3-clock { 118 compatible = "fixed-clock"; 119 #clock-cells = <0>; 120 clock-frequency = <74250000>; 121 }; 122}; 123 124&extal_clk { 125 clock-frequency = <20000000>; 126}; 127 128&pfc { 129 pinctrl-0 = <&scif_clk_pins>; 130 pinctrl-names = "default"; 131 132 scif2_pins: serial2 { 133 renesas,groups = "scif2_data"; 134 renesas,function = "scif2"; 135 }; 136 137 scif_clk_pins: scif_clk { 138 renesas,groups = "scif_clk"; 139 renesas,function = "scif_clk"; 140 }; 141 142 ether_pins: ether { 143 renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; 144 renesas,function = "eth"; 145 }; 146 147 phy1_pins: phy1 { 148 renesas,groups = "intc_irq8"; 149 renesas,function = "intc"; 150 }; 151 152 i2c1_pins: i2c1 { 153 renesas,groups = "i2c1"; 154 renesas,function = "i2c1"; 155 }; 156 157 mmcif0_pins: mmcif0 { 158 renesas,groups = "mmc_data8", "mmc_ctrl"; 159 renesas,function = "mmc"; 160 }; 161 162 sdhi1_pins: sd1 { 163 renesas,groups = "sdhi1_data4", "sdhi1_ctrl"; 164 renesas,function = "sdhi1"; 165 }; 166 167 qspi_pins: spi0 { 168 renesas,groups = "qspi_ctrl", "qspi_data4"; 169 renesas,function = "qspi"; 170 }; 171 172 vin0_pins: vin0 { 173 renesas,groups = "vin0_data8", "vin0_clk"; 174 renesas,function = "vin0"; 175 }; 176 177 usb0_pins: usb0 { 178 renesas,groups = "usb0"; 179 renesas,function = "usb0"; 180 }; 181 182 usb1_pins: usb1 { 183 renesas,groups = "usb1"; 184 renesas,function = "usb1"; 185 }; 186}; 187 188&scif2 { 189 pinctrl-0 = <&scif2_pins>; 190 pinctrl-names = "default"; 191 192 status = "okay"; 193}; 194 195&scif_clk { 196 clock-frequency = <14745600>; 197 status = "okay"; 198}; 199 200&ether { 201 pinctrl-0 = <&ether_pins &phy1_pins>; 202 pinctrl-names = "default"; 203 204 phy-handle = <&phy1>; 205 renesas,ether-link-active-low; 206 status = "okay"; 207 208 phy1: ethernet-phy@1 { 209 reg = <1>; 210 interrupt-parent = <&irqc0>; 211 interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 212 micrel,led-mode = <1>; 213 }; 214}; 215 216&i2c1 { 217 pinctrl-0 = <&i2c1_pins>; 218 pinctrl-names = "default"; 219 220 status = "okay"; 221 clock-frequency = <400000>; 222 223 composite-in@20 { 224 compatible = "adi,adv7180"; 225 reg = <0x20>; 226 remote = <&vin0>; 227 228 port { 229 adv7180: endpoint { 230 bus-width = <8>; 231 remote-endpoint = <&vin0ep>; 232 }; 233 }; 234 }; 235 236 hdmi@39 { 237 compatible = "adi,adv7511w"; 238 reg = <0x39>; 239 interrupt-parent = <&gpio5>; 240 interrupts = <23 IRQ_TYPE_LEVEL_LOW>; 241 242 adi,input-depth = <8>; 243 adi,input-colorspace = "rgb"; 244 adi,input-clock = "1x"; 245 adi,input-style = <1>; 246 adi,input-justification = "evenly"; 247 248 ports { 249 #address-cells = <1>; 250 #size-cells = <0>; 251 252 port@0 { 253 reg = <0>; 254 adv7511_in: endpoint { 255 remote-endpoint = <&du_out_rgb0>; 256 }; 257 }; 258 259 port@1 { 260 reg = <1>; 261 adv7511_out: endpoint { 262 remote-endpoint = <&hdmi_con>; 263 }; 264 }; 265 }; 266 }; 267}; 268 269&mmcif0 { 270 pinctrl-0 = <&mmcif0_pins>; 271 pinctrl-names = "default"; 272 273 vmmc-supply = <&d3_3v>; 274 vqmmc-supply = <&d3_3v>; 275 bus-width = <8>; 276 non-removable; 277 status = "okay"; 278}; 279 280&sdhi1 { 281 pinctrl-0 = <&sdhi1_pins>; 282 pinctrl-names = "default"; 283 284 vmmc-supply = <&vcc_sdhi1>; 285 vqmmc-supply = <&vccq_sdhi1>; 286 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; 287 status = "okay"; 288}; 289 290&qspi { 291 pinctrl-0 = <&qspi_pins>; 292 pinctrl-names = "default"; 293 294 status = "okay"; 295 296 flash@0 { 297 compatible = "spansion,s25fl512s", "jedec,spi-nor"; 298 reg = <0>; 299 spi-max-frequency = <30000000>; 300 spi-tx-bus-width = <4>; 301 spi-rx-bus-width = <4>; 302 spi-cpol; 303 spi-cpha; 304 m25p,fast-read; 305 306 partitions { 307 compatible = "fixed-partitions"; 308 #address-cells = <1>; 309 #size-cells = <1>; 310 311 partition@0 { 312 label = "loader"; 313 reg = <0x00000000 0x00040000>; 314 read-only; 315 }; 316 partition@40000 { 317 label = "user"; 318 reg = <0x00040000 0x00400000>; 319 read-only; 320 }; 321 partition@440000 { 322 label = "flash"; 323 reg = <0x00440000 0x03bc0000>; 324 }; 325 }; 326 }; 327}; 328 329/* composite video input */ 330&vin0 { 331 status = "okay"; 332 pinctrl-0 = <&vin0_pins>; 333 pinctrl-names = "default"; 334 335 port { 336 #address-cells = <1>; 337 #size-cells = <0>; 338 339 vin0ep: endpoint { 340 remote-endpoint = <&adv7180>; 341 bus-width = <8>; 342 }; 343 }; 344}; 345 346&pci0 { 347 status = "okay"; 348 pinctrl-0 = <&usb0_pins>; 349 pinctrl-names = "default"; 350}; 351 352&pci1 { 353 status = "okay"; 354 pinctrl-0 = <&usb1_pins>; 355 pinctrl-names = "default"; 356}; 357 358&usbphy { 359 status = "okay"; 360}; 361 362&du { 363 status = "okay"; 364 365 clocks = <&mstp7_clks R8A7794_CLK_DU0>, 366 <&mstp7_clks R8A7794_CLK_DU0>, 367 <&x2_clk>, <&x3_clk>; 368 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; 369 370 ports { 371 port@0 { 372 endpoint { 373 remote-endpoint = <&adv7511_in>; 374 }; 375 }; 376 port@1 { 377 endpoint { 378 remote-endpoint = <&adv7123_in>; 379 }; 380 }; 381 }; 382};