tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version
5 * 2 of the License, or (at your option) any later version.
6 */
7#ifndef _ASM_POWERPC_CACHEFLUSH_H
8#define _ASM_POWERPC_CACHEFLUSH_H
9
10#ifdef __KERNEL__
11
12#include <linux/mm.h>
13#include <asm/cputable.h>
14
15/*
16 * No cache flushing is required when address mappings are changed,
17 * because the caches on PowerPCs are physically addressed.
18 */
19#define flush_cache_all() do { } while (0)
20#define flush_cache_mm(mm) do { } while (0)
21#define flush_cache_dup_mm(mm) do { } while (0)
22#define flush_cache_range(vma, start, end) do { } while (0)
23#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
24#define flush_icache_page(vma, page) do { } while (0)
25#define flush_cache_vmap(start, end) do { } while (0)
26#define flush_cache_vunmap(start, end) do { } while (0)
27
28#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
29extern void flush_dcache_page(struct page *page);
30#define flush_dcache_mmap_lock(mapping) do { } while (0)
31#define flush_dcache_mmap_unlock(mapping) do { } while (0)
32
33extern void flush_icache_range(unsigned long, unsigned long);
34extern void flush_icache_user_range(struct vm_area_struct *vma,
35 struct page *page, unsigned long addr,
36 int len);
37extern void __flush_dcache_icache(void *page_va);
38extern void flush_dcache_icache_page(struct page *page);
39#if defined(CONFIG_PPC32) && !defined(CONFIG_BOOKE)
40extern void __flush_dcache_icache_phys(unsigned long physaddr);
41#else
42static inline void __flush_dcache_icache_phys(unsigned long physaddr)
43{
44 BUG();
45}
46#endif
47
48#ifdef CONFIG_PPC32
49/*
50 * Write any modified data cache blocks out to memory and invalidate them.
51 * Does not invalidate the corresponding instruction cache blocks.
52 */
53static inline void flush_dcache_range(unsigned long start, unsigned long stop)
54{
55 void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
56 unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
57 unsigned long i;
58
59 for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
60 dcbf(addr);
61 mb(); /* sync */
62}
63
64/*
65 * Write any modified data cache blocks out to memory.
66 * Does not invalidate the corresponding cache lines (especially for
67 * any corresponding instruction cache).
68 */
69static inline void clean_dcache_range(unsigned long start, unsigned long stop)
70{
71 void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
72 unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
73 unsigned long i;
74
75 for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
76 dcbst(addr);
77 mb(); /* sync */
78}
79
80/*
81 * Like above, but invalidate the D-cache. This is used by the 8xx
82 * to invalidate the cache so the PPC core doesn't get stale data
83 * from the CPM (no cache snooping here :-).
84 */
85static inline void invalidate_dcache_range(unsigned long start,
86 unsigned long stop)
87{
88 void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
89 unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
90 unsigned long i;
91
92 for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
93 dcbi(addr);
94 mb(); /* sync */
95}
96
97#endif /* CONFIG_PPC32 */
98#ifdef CONFIG_PPC64
99extern void flush_dcache_range(unsigned long start, unsigned long stop);
100extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
101extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);
102#endif
103
104#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
105 do { \
106 memcpy(dst, src, len); \
107 flush_icache_user_range(vma, page, vaddr, len); \
108 } while (0)
109#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
110 memcpy(dst, src, len)
111
112#endif /* __KERNEL__ */
113
114#endif /* _ASM_POWERPC_CACHEFLUSH_H */