tjh.dev
Linux kernel mirror (for testing)
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linux
1* Renesas Electronics Ethernet AVB
2
3This file provides information on what the device node for the Ethernet AVB
4interface contains.
5
6Required properties:
7- compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC.
8 "renesas,etheravb-r8a7791" if the device is a part of R8A7791 SoC.
9 "renesas,etheravb-r8a7792" if the device is a part of R8A7792 SoC.
10 "renesas,etheravb-r8a7793" if the device is a part of R8A7793 SoC.
11 "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC.
12 "renesas,etheravb-r8a7795" if the device is a part of R8A7795 SoC.
13 "renesas,etheravb-rcar-gen2" for generic R-Car Gen 2 compatible interface.
14 "renesas,etheravb-rcar-gen3" for generic R-Car Gen 3 compatible interface.
15
16 When compatible with the generic version, nodes must list the
17 SoC-specific version corresponding to the platform first
18 followed by the generic version.
19
20- reg: offset and length of (1) the register block and (2) the stream buffer.
21- interrupts: A list of interrupt-specifiers, one for each entry in
22 interrupt-names.
23 If interrupt-names is not present, an interrupt specifier
24 for a single muxed interrupt.
25- phy-mode: see ethernet.txt file in the same directory.
26- phy-handle: see ethernet.txt file in the same directory.
27- #address-cells: number of address cells for the MDIO bus, must be equal to 1.
28- #size-cells: number of size cells on the MDIO bus, must be equal to 0.
29- clocks: clock phandle and specifier pair.
30- pinctrl-0: phandle, referring to a default pin configuration node.
31
32Optional properties:
33- interrupt-parent: the phandle for the interrupt controller that services
34 interrupts for this device.
35- interrupt-names: A list of interrupt names.
36 For the R8A7795 SoC this property is mandatory;
37 it should include one entry per channel, named "ch%u",
38 where %u is the channel number ranging from 0 to 24.
39 For other SoCs this property is optional; if present
40 it should contain "mux" for a single muxed interrupt.
41- pinctrl-names: pin configuration state name ("default").
42- renesas,no-ether-link: boolean, specify when a board does not provide a proper
43 AVB_LINK signal.
44- renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is
45 active-low instead of normal active-high.
46
47Example:
48
49 ethernet@e6800000 {
50 compatible = "renesas,etheravb-r8a7795", "renesas,etheravb-rcar-gen3";
51 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
52 interrupt-parent = <&gic>;
53 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
54 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
55 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
56 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
57 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
58 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
59 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
60 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
61 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
62 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
63 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
64 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
65 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
66 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
67 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
68 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
69 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
70 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
71 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
72 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
73 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
74 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
75 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
76 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
77 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
78 interrupt-names = "ch0", "ch1", "ch2", "ch3",
79 "ch4", "ch5", "ch6", "ch7",
80 "ch8", "ch9", "ch10", "ch11",
81 "ch12", "ch13", "ch14", "ch15",
82 "ch16", "ch17", "ch18", "ch19",
83 "ch20", "ch21", "ch22", "ch23",
84 "ch24";
85 clocks = <&cpg CPG_MOD 812>;
86 power-domains = <&cpg>;
87 phy-mode = "rgmii-id";
88 phy-handle = <&phy0>;
89
90 pinctrl-0 = <ðer_pins>;
91 pinctrl-names = "default";
92 renesas,no-ether-link;
93 #address-cells = <1>;
94 #size-cells = <0>;
95
96 phy0: ethernet-phy@0 {
97 rxc-skew-ps = <900>;
98 rxdv-skew-ps = <0>;
99 rxd0-skew-ps = <0>;
100 rxd1-skew-ps = <0>;
101 rxd2-skew-ps = <0>;
102 rxd3-skew-ps = <0>;
103 txc-skew-ps = <900>;
104 txen-skew-ps = <0>;
105 txd0-skew-ps = <0>;
106 txd1-skew-ps = <0>;
107 txd2-skew-ps = <0>;
108 txd3-skew-ps = <0>;
109 reg = <0>;
110 interrupt-parent = <&gpio2>;
111 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
112 };
113 };