tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "dra74x.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13
14/ {
15 model = "TI AM5728 BeagleBoard-X15";
16 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
17
18 aliases {
19 rtc0 = &mcp_rtc;
20 rtc1 = &tps659038_rtc;
21 rtc2 = &rtc;
22 display0 = &hdmi0;
23 };
24
25 memory {
26 device_type = "memory";
27 reg = <0x80000000 0x80000000>;
28 };
29
30 vdd_3v3: fixedregulator-vdd_3v3 {
31 compatible = "regulator-fixed";
32 regulator-name = "vdd_3v3";
33 vin-supply = <®en1>;
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36 };
37
38 aic_dvdd: fixedregulator-aic_dvdd {
39 compatible = "regulator-fixed";
40 regulator-name = "aic_dvdd_fixed";
41 vin-supply = <&vdd_3v3>;
42 regulator-min-microvolt = <1800000>;
43 regulator-max-microvolt = <1800000>;
44 };
45
46 vtt_fixed: fixedregulator-vtt {
47 /* TPS51200 */
48 compatible = "regulator-fixed";
49 regulator-name = "vtt_fixed";
50 vin-supply = <&smps3_reg>;
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-always-on;
54 regulator-boot-on;
55 enable-active-high;
56 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
57 };
58
59 leds {
60 compatible = "gpio-leds";
61 pinctrl-names = "default";
62 pinctrl-0 = <&leds_pins_default>;
63
64 led@0 {
65 label = "beagle-x15:usr0";
66 gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
67 linux,default-trigger = "heartbeat";
68 default-state = "off";
69 };
70
71 led@1 {
72 label = "beagle-x15:usr1";
73 gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
74 linux,default-trigger = "cpu0";
75 default-state = "off";
76 };
77
78 led@2 {
79 label = "beagle-x15:usr2";
80 gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
81 linux,default-trigger = "mmc0";
82 default-state = "off";
83 };
84
85 led@3 {
86 label = "beagle-x15:usr3";
87 gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
88 linux,default-trigger = "ide-disk";
89 default-state = "off";
90 };
91 };
92
93 gpio_fan: gpio_fan {
94 /* Based on 5v 500mA AFB02505HHB */
95 compatible = "gpio-fan";
96 gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
97 gpio-fan,speed-map = <0 0>,
98 <13000 1>;
99 #cooling-cells = <2>;
100 };
101
102 extcon_usb1: extcon_usb1 {
103 compatible = "linux,extcon-usb-gpio";
104 id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&extcon_usb1_pins>;
107 };
108
109 hdmi0: connector {
110 compatible = "hdmi-connector";
111 label = "hdmi";
112
113 type = "a";
114
115 port {
116 hdmi_connector_in: endpoint {
117 remote-endpoint = <&tpd12s015_out>;
118 };
119 };
120 };
121
122 tpd12s015: encoder {
123 compatible = "ti,tpd12s015";
124
125 pinctrl-names = "default";
126 pinctrl-0 = <&tpd12s015_pins>;
127
128 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
129 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
130 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
131
132 ports {
133 #address-cells = <1>;
134 #size-cells = <0>;
135
136 port@0 {
137 reg = <0>;
138
139 tpd12s015_in: endpoint {
140 remote-endpoint = <&hdmi_out>;
141 };
142 };
143
144 port@1 {
145 reg = <1>;
146
147 tpd12s015_out: endpoint {
148 remote-endpoint = <&hdmi_connector_in>;
149 };
150 };
151 };
152 };
153
154 sound0: sound@0 {
155 compatible = "simple-audio-card";
156 simple-audio-card,name = "BeagleBoard-X15";
157 simple-audio-card,widgets =
158 "Line", "Line Out",
159 "Line", "Line In";
160 simple-audio-card,routing =
161 "Line Out", "LLOUT",
162 "Line Out", "RLOUT",
163 "MIC2L", "Line In",
164 "MIC2R", "Line In";
165 simple-audio-card,format = "dsp_b";
166 simple-audio-card,bitclock-master = <&sound0_master>;
167 simple-audio-card,frame-master = <&sound0_master>;
168 simple-audio-card,bitclock-inversion;
169
170 simple-audio-card,cpu {
171 sound-dai = <&mcasp3>;
172 };
173
174 sound0_master: simple-audio-card,codec {
175 sound-dai = <&tlv320aic3104>;
176 assigned-clocks = <&clkoutmux2_clk_mux>;
177 assigned-clock-parents = <&sys_clk2_dclk_div>;
178 clocks = <&clkout2_clk>;
179 };
180 };
181};
182
183&dra7_pmx_core {
184 leds_pins_default: leds_pins_default {
185 pinctrl-single,pins = <
186 DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
187 DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
188 DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
189 DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
190 >;
191 };
192
193 i2c1_pins_default: i2c1_pins_default {
194 pinctrl-single,pins = <
195 DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
196 DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
197 >;
198 };
199
200 hdmi_pins: pinmux_hdmi_pins {
201 pinctrl-single,pins = <
202 DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
203 DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
204 >;
205 };
206
207 i2c3_pins_default: i2c3_pins_default {
208 pinctrl-single,pins = <
209 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
210 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
211 >;
212 };
213
214 uart3_pins_default: uart3_pins_default {
215 pinctrl-single,pins = <
216 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
217 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
218 >;
219 };
220
221 mmc1_pins_default: mmc1_pins_default {
222 pinctrl-single,pins = <
223 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
224 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
225 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
226 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
227 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
228 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
229 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
230 >;
231 };
232
233 mmc2_pins_default: mmc2_pins_default {
234 pinctrl-single,pins = <
235 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
236 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
237 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
238 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
239 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
240 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
241 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
242 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
243 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
244 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
245 >;
246 };
247
248 cpsw_pins_default: cpsw_pins_default {
249 pinctrl-single,pins = <
250 /* Slave 1 */
251 DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
252 DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
253 DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
254 DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
255 DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
256 DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
257 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
258 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
259 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
260 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
261 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
262 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
263
264 /* Slave 2 */
265 DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
266 DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
267 DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
268 DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
269 DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
270 DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
271 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
272 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
273 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
274 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
275 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
276 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
277 >;
278
279 };
280
281 cpsw_pins_sleep: cpsw_pins_sleep {
282 pinctrl-single,pins = <
283 /* Slave 1 */
284 DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
285 DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15)
286 DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15)
287 DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15)
288 DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15)
289 DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15)
290 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15)
291 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15)
292 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15)
293 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15)
294 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15)
295 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15)
296
297 /* Slave 2 */
298 DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15)
299 DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15)
300 DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15)
301 DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15)
302 DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15)
303 DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15)
304 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15)
305 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15)
306 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15)
307 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15)
308 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15)
309 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15)
310 >;
311 };
312
313 davinci_mdio_pins_default: davinci_mdio_pins_default {
314 pinctrl-single,pins = <
315 /* MDIO */
316 DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
317 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
318 >;
319 };
320
321 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
322 pinctrl-single,pins = <
323 DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15)
324 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15)
325 >;
326 };
327
328 tps659038_pins_default: tps659038_pins_default {
329 pinctrl-single,pins = <
330 DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
331 >;
332 };
333
334 tmp102_pins_default: tmp102_pins_default {
335 pinctrl-single,pins = <
336 DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
337 >;
338 };
339
340 mcp79410_pins_default: mcp79410_pins_default {
341 pinctrl-single,pins = <
342 DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
343 >;
344 };
345
346 usb1_pins: pinmux_usb1_pins {
347 pinctrl-single,pins = <
348 DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
349 >;
350 };
351
352 extcon_usb1_pins: extcon_usb1_pins {
353 pinctrl-single,pins = <
354 DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
355 >;
356 };
357
358 tpd12s015_pins: pinmux_tpd12s015_pins {
359 pinctrl-single,pins = <
360 DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
361 DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
362 DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
363 >;
364 };
365
366 clkout2_pins_default: clkout2_pins_default {
367 pinctrl-single,pins = <
368 DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
369 >;
370 };
371
372 clkout2_pins_sleep: clkout2_pins_sleep {
373 pinctrl-single,pins = <
374 DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
375 >;
376 };
377
378 mcasp3_pins_default: mcasp3_pins_default {
379 pinctrl-single,pins = <
380 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
381 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
382 DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
383 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
384 >;
385 };
386
387 mcasp3_pins_sleep: mcasp3_pins_sleep {
388 pinctrl-single,pins = <
389 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
390 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
391 DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15)
392 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15)
393 >;
394 };
395};
396
397&i2c1 {
398 status = "okay";
399 pinctrl-names = "default";
400 pinctrl-0 = <&i2c1_pins_default>;
401 clock-frequency = <400000>;
402
403 tps659038: tps659038@58 {
404 compatible = "ti,tps659038";
405 reg = <0x58>;
406 interrupt-parent = <&gpio1>;
407 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
408
409 pinctrl-names = "default";
410 pinctrl-0 = <&tps659038_pins_default>;
411
412 #interrupt-cells = <2>;
413 interrupt-controller;
414
415 ti,system-power-controller;
416
417 tps659038_pmic {
418 compatible = "ti,tps659038-pmic";
419
420 regulators {
421 smps12_reg: smps12 {
422 /* VDD_MPU */
423 regulator-name = "smps12";
424 regulator-min-microvolt = < 850000>;
425 regulator-max-microvolt = <1250000>;
426 regulator-always-on;
427 regulator-boot-on;
428 };
429
430 smps3_reg: smps3 {
431 /* VDD_DDR */
432 regulator-name = "smps3";
433 regulator-min-microvolt = <1350000>;
434 regulator-max-microvolt = <1350000>;
435 regulator-always-on;
436 regulator-boot-on;
437 };
438
439 smps45_reg: smps45 {
440 /* VDD_DSPEVE, VDD_IVA, VDD_GPU */
441 regulator-name = "smps45";
442 regulator-min-microvolt = < 850000>;
443 regulator-max-microvolt = <1150000>;
444 regulator-always-on;
445 regulator-boot-on;
446 };
447
448 smps6_reg: smps6 {
449 /* VDD_CORE */
450 regulator-name = "smps6";
451 regulator-min-microvolt = <850000>;
452 regulator-max-microvolt = <1030000>;
453 regulator-always-on;
454 regulator-boot-on;
455 };
456
457 /* SMPS7 unused */
458
459 smps8_reg: smps8 {
460 /* VDD_1V8 */
461 regulator-name = "smps8";
462 regulator-min-microvolt = <1800000>;
463 regulator-max-microvolt = <1800000>;
464 regulator-always-on;
465 regulator-boot-on;
466 };
467
468 /* SMPS9 unused */
469
470 ldo1_reg: ldo1 {
471 /* VDD_SD / VDDSHV8 */
472 regulator-name = "ldo1";
473 regulator-min-microvolt = <1800000>;
474 regulator-max-microvolt = <3300000>;
475 regulator-boot-on;
476 regulator-always-on;
477 };
478
479 ldo2_reg: ldo2 {
480 /* VDD_SHV5 */
481 regulator-name = "ldo2";
482 regulator-min-microvolt = <3300000>;
483 regulator-max-microvolt = <3300000>;
484 regulator-always-on;
485 regulator-boot-on;
486 };
487
488 ldo3_reg: ldo3 {
489 /* VDDA_1V8_PHYA */
490 regulator-name = "ldo3";
491 regulator-min-microvolt = <1800000>;
492 regulator-max-microvolt = <1800000>;
493 regulator-always-on;
494 regulator-boot-on;
495 };
496
497 ldo4_reg: ldo4 {
498 /* VDDA_1V8_PHYB */
499 regulator-name = "ldo4";
500 regulator-min-microvolt = <1800000>;
501 regulator-max-microvolt = <1800000>;
502 regulator-always-on;
503 regulator-boot-on;
504 };
505
506 ldo9_reg: ldo9 {
507 /* VDD_RTC */
508 regulator-name = "ldo9";
509 regulator-min-microvolt = <1050000>;
510 regulator-max-microvolt = <1050000>;
511 regulator-always-on;
512 regulator-boot-on;
513 };
514
515 ldoln_reg: ldoln {
516 /* VDDA_1V8_PLL */
517 regulator-name = "ldoln";
518 regulator-min-microvolt = <1800000>;
519 regulator-max-microvolt = <1800000>;
520 regulator-always-on;
521 regulator-boot-on;
522 };
523
524 ldousb_reg: ldousb {
525 /* VDDA_3V_USB: VDDA_USBHS33 */
526 regulator-name = "ldousb";
527 regulator-min-microvolt = <3300000>;
528 regulator-max-microvolt = <3300000>;
529 regulator-boot-on;
530 };
531
532 regen1: regen1 {
533 /* VDD_3V3_ON */
534 regulator-name = "regen1";
535 regulator-boot-on;
536 regulator-always-on;
537 };
538 };
539 };
540
541 tps659038_rtc: tps659038_rtc {
542 compatible = "ti,palmas-rtc";
543 interrupt-parent = <&tps659038>;
544 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
545 wakeup-source;
546 };
547
548 tps659038_pwr_button: tps659038_pwr_button {
549 compatible = "ti,palmas-pwrbutton";
550 interrupt-parent = <&tps659038>;
551 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
552 wakeup-source;
553 ti,palmas-long-press-seconds = <12>;
554 };
555
556 tps659038_gpio: tps659038_gpio {
557 compatible = "ti,palmas-gpio";
558 gpio-controller;
559 #gpio-cells = <2>;
560 };
561
562 extcon_usb2: tps659038_usb {
563 compatible = "ti,palmas-usb-vid";
564 ti,enable-vbus-detection;
565 ti,enable-id-detection;
566 id-gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>;
567 };
568
569 };
570
571 tmp102: tmp102@48 {
572 compatible = "ti,tmp102";
573 reg = <0x48>;
574 pinctrl-names = "default";
575 pinctrl-0 = <&tmp102_pins_default>;
576 interrupt-parent = <&gpio7>;
577 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
578 #thermal-sensor-cells = <1>;
579 };
580
581 tlv320aic3104: tlv320aic3104@18 {
582 #sound-dai-cells = <0>;
583 compatible = "ti,tlv320aic3104";
584 reg = <0x18>;
585 pinctrl-names = "default", "sleep";
586 pinctrl-0 = <&clkout2_pins_default>;
587 pinctrl-1 = <&clkout2_pins_sleep>;
588 status = "okay";
589 adc-settle-ms = <40>;
590
591 AVDD-supply = <&vdd_3v3>;
592 IOVDD-supply = <&vdd_3v3>;
593 DRVDD-supply = <&vdd_3v3>;
594 DVDD-supply = <&aic_dvdd>;
595 };
596};
597
598&i2c3 {
599 status = "okay";
600 pinctrl-names = "default";
601 pinctrl-0 = <&i2c3_pins_default>;
602 clock-frequency = <400000>;
603
604 mcp_rtc: rtc@6f {
605 compatible = "microchip,mcp7941x";
606 reg = <0x6f>;
607 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
608 <&dra7_pmx_core 0x424>;
609 interrupt-names = "irq", "wakeup";
610
611 pinctrl-names = "default";
612 pinctrl-0 = <&mcp79410_pins_default>;
613
614 vcc-supply = <&vdd_3v3>;
615 wakeup-source;
616 };
617};
618
619&gpio7 {
620 ti,no-reset-on-init;
621 ti,no-idle-on-init;
622};
623
624&cpu0 {
625 cpu0-supply = <&smps12_reg>;
626 voltage-tolerance = <1>;
627};
628
629&uart3 {
630 status = "okay";
631 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
632 <&dra7_pmx_core 0x3f8>;
633
634 pinctrl-names = "default";
635 pinctrl-0 = <&uart3_pins_default>;
636};
637
638&mac {
639 status = "okay";
640 pinctrl-names = "default", "sleep";
641 pinctrl-0 = <&cpsw_pins_default>;
642 pinctrl-1 = <&cpsw_pins_sleep>;
643 dual_emac;
644};
645
646&cpsw_emac0 {
647 phy_id = <&davinci_mdio>, <1>;
648 phy-mode = "rgmii";
649 dual_emac_res_vlan = <1>;
650};
651
652&cpsw_emac1 {
653 phy_id = <&davinci_mdio>, <2>;
654 phy-mode = "rgmii";
655 dual_emac_res_vlan = <2>;
656};
657
658&davinci_mdio {
659 pinctrl-names = "default", "sleep";
660 pinctrl-0 = <&davinci_mdio_pins_default>;
661 pinctrl-1 = <&davinci_mdio_pins_sleep>;
662};
663
664&mmc1 {
665 status = "okay";
666
667 pinctrl-names = "default";
668 pinctrl-0 = <&mmc1_pins_default>;
669
670 vmmc-supply = <&ldo1_reg>;
671 bus-width = <4>;
672 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
673};
674
675&mmc2 {
676 status = "okay";
677
678 pinctrl-names = "default";
679 pinctrl-0 = <&mmc2_pins_default>;
680
681 vmmc-supply = <&vdd_3v3>;
682 bus-width = <8>;
683 ti,non-removable;
684 cap-mmc-dual-data-rate;
685};
686
687&sata {
688 status = "okay";
689};
690
691&usb2_phy1 {
692 phy-supply = <&ldousb_reg>;
693};
694
695&usb2_phy2 {
696 phy-supply = <&ldousb_reg>;
697};
698
699&usb1 {
700 dr_mode = "host";
701 pinctrl-names = "default";
702 pinctrl-0 = <&usb1_pins>;
703};
704
705&omap_dwc3_1 {
706 extcon = <&extcon_usb1>;
707};
708
709&omap_dwc3_2 {
710 extcon = <&extcon_usb2>;
711};
712
713&usb2 {
714 /*
715 * Stand alone usage is peripheral only.
716 * However, with some resistor modifications
717 * this port can be used via expansion connectors
718 * as "host" or "dual-role". If so, provide
719 * the necessary dr_mode override in the expansion
720 * board's DT.
721 */
722 dr_mode = "peripheral";
723};
724
725&cpu_trips {
726 cpu_alert1: cpu_alert1 {
727 temperature = <50000>; /* millicelsius */
728 hysteresis = <2000>; /* millicelsius */
729 type = "active";
730 };
731};
732
733&cpu_cooling_maps {
734 map1 {
735 trip = <&cpu_alert1>;
736 cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
737 };
738};
739
740&thermal_zones {
741 board_thermal: board_thermal {
742 polling-delay-passive = <1250>; /* milliseconds */
743 polling-delay = <1500>; /* milliseconds */
744
745 /* sensor ID */
746 thermal-sensors = <&tmp102 0>;
747
748 board_trips: trips {
749 board_alert0: board_alert {
750 temperature = <40000>; /* millicelsius */
751 hysteresis = <2000>; /* millicelsius */
752 type = "active";
753 };
754
755 board_crit: board_crit {
756 temperature = <105000>; /* millicelsius */
757 hysteresis = <0>; /* millicelsius */
758 type = "critical";
759 };
760 };
761
762 board_cooling_maps: cooling-maps {
763 map0 {
764 trip = <&board_alert0>;
765 cooling-device =
766 <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
767 };
768 };
769 };
770};
771
772&dss {
773 status = "ok"
774
775 vdda_video-supply = <&ldoln_reg>;
776};
777
778&hdmi {
779 status = "ok"
780 vdda-supply = <&ldo4_reg>;
781
782 pinctrl-names = "default";
783 pinctrl-0 = <&hdmi_pins>;
784
785 port {
786 hdmi_out: endpoint {
787 remote-endpoint = <&tpd12s015_in>;
788 };
789 };
790};
791
792&pcie1 {
793 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
794};
795
796&mcasp3 {
797 #sound-dai-cells = <0>;
798 pinctrl-names = "default", "sleep";
799 pinctrl-0 = <&mcasp3_pins_default>;
800 pinctrl-1 = <&mcasp3_pins_sleep>;
801 assigned-clocks = <&mcasp3_ahclkx_mux>;
802 assigned-clock-parents = <&sys_clkin2>;
803 status = "okay";
804
805 op-mode = <0>; /* MCASP_IIS_MODE */
806 tdm-slots = <2>;
807 /* 4 serializers */
808 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
809 1 2 0 0
810 >;
811};
812
813&mailbox5 {
814 status = "okay";
815 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
816 status = "okay";
817 };
818 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
819 status = "okay";
820 };
821};
822
823&mailbox6 {
824 status = "okay";
825 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
826 status = "okay";
827 };
828 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
829 status = "okay";
830 };
831};