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1Qualcomm Shared Memory State Machine
2
3The Shared Memory State Machine facilitates broadcasting of single bit state
4information between the processors in a Qualcomm SoC. Each processor is
5assigned 32 bits of state that can be modified. A processor can through a
6matrix of bitmaps signal subscription of notifications upon changes to a
7certain bit owned by a certain remote processor.
8
9- compatible:
10 Usage: required
11 Value type: <string>
12 Definition: must be one of:
13 "qcom,smsm"
14
15- qcom,ipc-N:
16 Usage: required
17 Value type: <prop-encoded-array>
18 Definition: three entries specifying the outgoing ipc bit used for
19 signaling the N:th remote processor
20 - phandle to a syscon node representing the apcs registers
21 - u32 representing offset to the register within the syscon
22 - u32 representing the ipc bit within the register
23
24- qcom,local-host:
25 Usage: optional
26 Value type: <u32>
27 Definition: identifier of the local processor in the list of hosts, or
28 in other words specifier of the column in the subscription
29 matrix representing the local processor
30 defaults to host 0
31
32- #address-cells:
33 Usage: required
34 Value type: <u32>
35 Definition: must be 1
36
37- #size-cells:
38 Usage: required
39 Value type: <u32>
40 Definition: must be 0
41
42= SUBNODES
43Each processor's state bits are described by a subnode of the smsm device node.
44Nodes can either be flagged as an interrupt-controller to denote a remote
45processor's state bits or the local processors bits. The node names are not
46important.
47
48- reg:
49 Usage: required
50 Value type: <u32>
51 Definition: specifies the offset, in words, of the first bit for this
52 entry
53
54- #qcom,state-cells:
55 Usage: required for local entry
56 Value type: <u32>
57 Definition: must be 1 - denotes bit number
58
59- interrupt-controller:
60 Usage: required for remote entries
61 Value type: <empty>
62 Definition: marks the entry as a interrupt-controller and the state bits
63 to belong to a remote processor
64
65- #interrupt-cells:
66 Usage: required for remote entries
67 Value type: <u32>
68 Definition: must be 2 - denotes bit number and IRQ flags
69
70- interrupts:
71 Usage: required for remote entries
72 Value type: <prop-encoded-array>
73 Definition: one entry specifying remote IRQ used by the remote processor
74 to signal changes of its state bits
75
76
77= EXAMPLE
78The following example shows the SMEM setup for controlling properties of the
79wireless processor, defined from the 8974 apps processor's point-of-view. It
80encompasses one outbound entry and the outgoing interrupt for the wireless
81processor.
82
83smsm {
84 compatible = "qcom,smsm";
85
86 #address-cells = <1>;
87 #size-cells = <0>;
88
89 qcom,ipc-3 = <&apcs 8 19>;
90
91 apps_smsm: apps@0 {
92 reg = <0>;
93
94 #qcom,state-cells = <1>;
95 };
96
97 wcnss_smsm: wcnss@7 {
98 reg = <7>;
99 interrupts = <0 144 1>;
100
101 interrupt-controller;
102 #interrupt-cells = <2>;
103 };
104};