tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * AppliedMicro X-Gene SoC GPIO Driver
3 *
4 * Copyright (c) 2014, Applied Micro Circuits Corporation
5 * Author: Feng Kan <fkan@apm.com>.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/spinlock.h>
25#include <linux/platform_device.h>
26#include <linux/gpio/driver.h>
27#include <linux/types.h>
28#include <linux/bitops.h>
29
30#define GPIO_SET_DR_OFFSET 0x0C
31#define GPIO_DATA_OFFSET 0x14
32#define GPIO_BANK_STRIDE 0x0C
33
34#define XGENE_GPIOS_PER_BANK 16
35#define XGENE_MAX_GPIO_BANKS 3
36#define XGENE_MAX_GPIOS (XGENE_GPIOS_PER_BANK * XGENE_MAX_GPIO_BANKS)
37
38#define GPIO_BIT_OFFSET(x) (x % XGENE_GPIOS_PER_BANK)
39#define GPIO_BANK_OFFSET(x) ((x / XGENE_GPIOS_PER_BANK) * GPIO_BANK_STRIDE)
40
41struct xgene_gpio {
42 struct gpio_chip chip;
43 void __iomem *base;
44 spinlock_t lock;
45#ifdef CONFIG_PM
46 u32 set_dr_val[XGENE_MAX_GPIO_BANKS];
47#endif
48};
49
50static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset)
51{
52 struct xgene_gpio *chip = gpiochip_get_data(gc);
53 unsigned long bank_offset;
54 u32 bit_offset;
55
56 bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset);
57 bit_offset = GPIO_BIT_OFFSET(offset);
58 return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));
59}
60
61static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
62{
63 struct xgene_gpio *chip = gpiochip_get_data(gc);
64 unsigned long bank_offset;
65 u32 setval, bit_offset;
66
67 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
68 bit_offset = GPIO_BIT_OFFSET(offset) + XGENE_GPIOS_PER_BANK;
69
70 setval = ioread32(chip->base + bank_offset);
71 if (val)
72 setval |= BIT(bit_offset);
73 else
74 setval &= ~BIT(bit_offset);
75 iowrite32(setval, chip->base + bank_offset);
76}
77
78static void xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
79{
80 struct xgene_gpio *chip = gpiochip_get_data(gc);
81 unsigned long flags;
82
83 spin_lock_irqsave(&chip->lock, flags);
84 __xgene_gpio_set(gc, offset, val);
85 spin_unlock_irqrestore(&chip->lock, flags);
86}
87
88static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)
89{
90 struct xgene_gpio *chip = gpiochip_get_data(gc);
91 unsigned long flags, bank_offset;
92 u32 dirval, bit_offset;
93
94 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
95 bit_offset = GPIO_BIT_OFFSET(offset);
96
97 spin_lock_irqsave(&chip->lock, flags);
98
99 dirval = ioread32(chip->base + bank_offset);
100 dirval |= BIT(bit_offset);
101 iowrite32(dirval, chip->base + bank_offset);
102
103 spin_unlock_irqrestore(&chip->lock, flags);
104
105 return 0;
106}
107
108static int xgene_gpio_dir_out(struct gpio_chip *gc,
109 unsigned int offset, int val)
110{
111 struct xgene_gpio *chip = gpiochip_get_data(gc);
112 unsigned long flags, bank_offset;
113 u32 dirval, bit_offset;
114
115 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
116 bit_offset = GPIO_BIT_OFFSET(offset);
117
118 spin_lock_irqsave(&chip->lock, flags);
119
120 dirval = ioread32(chip->base + bank_offset);
121 dirval &= ~BIT(bit_offset);
122 iowrite32(dirval, chip->base + bank_offset);
123 __xgene_gpio_set(gc, offset, val);
124
125 spin_unlock_irqrestore(&chip->lock, flags);
126
127 return 0;
128}
129
130#ifdef CONFIG_PM
131static int xgene_gpio_suspend(struct device *dev)
132{
133 struct xgene_gpio *gpio = dev_get_drvdata(dev);
134 unsigned long bank_offset;
135 unsigned int bank;
136
137 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
138 bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
139 gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset);
140 }
141 return 0;
142}
143
144static int xgene_gpio_resume(struct device *dev)
145{
146 struct xgene_gpio *gpio = dev_get_drvdata(dev);
147 unsigned long bank_offset;
148 unsigned int bank;
149
150 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
151 bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
152 iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset);
153 }
154 return 0;
155}
156
157static SIMPLE_DEV_PM_OPS(xgene_gpio_pm, xgene_gpio_suspend, xgene_gpio_resume);
158#define XGENE_GPIO_PM_OPS (&xgene_gpio_pm)
159#else
160#define XGENE_GPIO_PM_OPS NULL
161#endif
162
163static int xgene_gpio_probe(struct platform_device *pdev)
164{
165 struct resource *res;
166 struct xgene_gpio *gpio;
167 int err = 0;
168
169 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
170 if (!gpio) {
171 err = -ENOMEM;
172 goto err;
173 }
174
175 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
176 gpio->base = devm_ioremap_nocache(&pdev->dev, res->start,
177 resource_size(res));
178 if (!gpio->base) {
179 err = -ENOMEM;
180 goto err;
181 }
182
183 gpio->chip.ngpio = XGENE_MAX_GPIOS;
184
185 spin_lock_init(&gpio->lock);
186 gpio->chip.parent = &pdev->dev;
187 gpio->chip.direction_input = xgene_gpio_dir_in;
188 gpio->chip.direction_output = xgene_gpio_dir_out;
189 gpio->chip.get = xgene_gpio_get;
190 gpio->chip.set = xgene_gpio_set;
191 gpio->chip.label = dev_name(&pdev->dev);
192 gpio->chip.base = -1;
193
194 platform_set_drvdata(pdev, gpio);
195
196 err = gpiochip_add_data(&gpio->chip, gpio);
197 if (err) {
198 dev_err(&pdev->dev,
199 "failed to register gpiochip.\n");
200 goto err;
201 }
202
203 dev_info(&pdev->dev, "X-Gene GPIO driver registered.\n");
204 return 0;
205err:
206 dev_err(&pdev->dev, "X-Gene GPIO driver registration failed.\n");
207 return err;
208}
209
210static int xgene_gpio_remove(struct platform_device *pdev)
211{
212 struct xgene_gpio *gpio = platform_get_drvdata(pdev);
213
214 gpiochip_remove(&gpio->chip);
215 return 0;
216}
217
218static const struct of_device_id xgene_gpio_of_match[] = {
219 { .compatible = "apm,xgene-gpio", },
220 {},
221};
222MODULE_DEVICE_TABLE(of, xgene_gpio_of_match);
223
224static struct platform_driver xgene_gpio_driver = {
225 .driver = {
226 .name = "xgene-gpio",
227 .of_match_table = xgene_gpio_of_match,
228 .pm = XGENE_GPIO_PM_OPS,
229 },
230 .probe = xgene_gpio_probe,
231 .remove = xgene_gpio_remove,
232};
233
234module_platform_driver(xgene_gpio_driver);
235
236MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
237MODULE_DESCRIPTION("APM X-Gene GPIO driver");
238MODULE_LICENSE("GPL");