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1#ifndef _ASM_X86_PGTABLE_H 2#define _ASM_X86_PGTABLE_H 3 4#include <asm/page.h> 5#include <asm/e820.h> 6 7#include <asm/pgtable_types.h> 8 9/* 10 * Macro to mark a page protection value as UC- 11 */ 12#define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18#ifndef __ASSEMBLY__ 19#include <asm/x86_init.h> 20 21void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd); 22 23/* 24 * ZERO_PAGE is a global shared page that is always zero: used 25 * for zero-mapped memory areas etc.. 26 */ 27extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 28 __visible; 29#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 30 31extern spinlock_t pgd_lock; 32extern struct list_head pgd_list; 33 34extern struct mm_struct *pgd_page_get_mm(struct page *page); 35 36#ifdef CONFIG_PARAVIRT 37#include <asm/paravirt.h> 38#else /* !CONFIG_PARAVIRT */ 39#define set_pte(ptep, pte) native_set_pte(ptep, pte) 40#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) 41#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd) 42 43#define set_pte_atomic(ptep, pte) \ 44 native_set_pte_atomic(ptep, pte) 45 46#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 47 48#ifndef __PAGETABLE_PUD_FOLDED 49#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 50#define pgd_clear(pgd) native_pgd_clear(pgd) 51#endif 52 53#ifndef set_pud 54# define set_pud(pudp, pud) native_set_pud(pudp, pud) 55#endif 56 57#ifndef __PAGETABLE_PMD_FOLDED 58#define pud_clear(pud) native_pud_clear(pud) 59#endif 60 61#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 62#define pmd_clear(pmd) native_pmd_clear(pmd) 63 64#define pte_update(mm, addr, ptep) do { } while (0) 65#define pte_update_defer(mm, addr, ptep) do { } while (0) 66#define pmd_update(mm, addr, ptep) do { } while (0) 67#define pmd_update_defer(mm, addr, ptep) do { } while (0) 68 69#define pgd_val(x) native_pgd_val(x) 70#define __pgd(x) native_make_pgd(x) 71 72#ifndef __PAGETABLE_PUD_FOLDED 73#define pud_val(x) native_pud_val(x) 74#define __pud(x) native_make_pud(x) 75#endif 76 77#ifndef __PAGETABLE_PMD_FOLDED 78#define pmd_val(x) native_pmd_val(x) 79#define __pmd(x) native_make_pmd(x) 80#endif 81 82#define pte_val(x) native_pte_val(x) 83#define __pte(x) native_make_pte(x) 84 85#define arch_end_context_switch(prev) do {} while(0) 86 87#endif /* CONFIG_PARAVIRT */ 88 89/* 90 * The following only work if pte_present() is true. 91 * Undefined behaviour if not.. 92 */ 93static inline int pte_dirty(pte_t pte) 94{ 95 return pte_flags(pte) & _PAGE_DIRTY; 96} 97 98static inline int pte_young(pte_t pte) 99{ 100 return pte_flags(pte) & _PAGE_ACCESSED; 101} 102 103static inline int pmd_dirty(pmd_t pmd) 104{ 105 return pmd_flags(pmd) & _PAGE_DIRTY; 106} 107 108static inline int pmd_young(pmd_t pmd) 109{ 110 return pmd_flags(pmd) & _PAGE_ACCESSED; 111} 112 113static inline int pte_write(pte_t pte) 114{ 115 return pte_flags(pte) & _PAGE_RW; 116} 117 118static inline int pte_huge(pte_t pte) 119{ 120 return pte_flags(pte) & _PAGE_PSE; 121} 122 123static inline int pte_global(pte_t pte) 124{ 125 return pte_flags(pte) & _PAGE_GLOBAL; 126} 127 128static inline int pte_exec(pte_t pte) 129{ 130 return !(pte_flags(pte) & _PAGE_NX); 131} 132 133static inline int pte_special(pte_t pte) 134{ 135 return pte_flags(pte) & _PAGE_SPECIAL; 136} 137 138static inline unsigned long pte_pfn(pte_t pte) 139{ 140 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; 141} 142 143static inline unsigned long pmd_pfn(pmd_t pmd) 144{ 145 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT; 146} 147 148static inline unsigned long pud_pfn(pud_t pud) 149{ 150 return (pud_val(pud) & PTE_PFN_MASK) >> PAGE_SHIFT; 151} 152 153#define pte_page(pte) pfn_to_page(pte_pfn(pte)) 154 155static inline int pmd_large(pmd_t pte) 156{ 157 return pmd_flags(pte) & _PAGE_PSE; 158} 159 160#ifdef CONFIG_TRANSPARENT_HUGEPAGE 161static inline int pmd_trans_splitting(pmd_t pmd) 162{ 163 return pmd_val(pmd) & _PAGE_SPLITTING; 164} 165 166static inline int pmd_trans_huge(pmd_t pmd) 167{ 168 return pmd_val(pmd) & _PAGE_PSE; 169} 170 171static inline int has_transparent_hugepage(void) 172{ 173 return cpu_has_pse; 174} 175#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 176 177static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 178{ 179 pteval_t v = native_pte_val(pte); 180 181 return native_make_pte(v | set); 182} 183 184static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 185{ 186 pteval_t v = native_pte_val(pte); 187 188 return native_make_pte(v & ~clear); 189} 190 191static inline pte_t pte_mkclean(pte_t pte) 192{ 193 return pte_clear_flags(pte, _PAGE_DIRTY); 194} 195 196static inline pte_t pte_mkold(pte_t pte) 197{ 198 return pte_clear_flags(pte, _PAGE_ACCESSED); 199} 200 201static inline pte_t pte_wrprotect(pte_t pte) 202{ 203 return pte_clear_flags(pte, _PAGE_RW); 204} 205 206static inline pte_t pte_mkexec(pte_t pte) 207{ 208 return pte_clear_flags(pte, _PAGE_NX); 209} 210 211static inline pte_t pte_mkdirty(pte_t pte) 212{ 213 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 214} 215 216static inline pte_t pte_mkyoung(pte_t pte) 217{ 218 return pte_set_flags(pte, _PAGE_ACCESSED); 219} 220 221static inline pte_t pte_mkwrite(pte_t pte) 222{ 223 return pte_set_flags(pte, _PAGE_RW); 224} 225 226static inline pte_t pte_mkhuge(pte_t pte) 227{ 228 return pte_set_flags(pte, _PAGE_PSE); 229} 230 231static inline pte_t pte_clrhuge(pte_t pte) 232{ 233 return pte_clear_flags(pte, _PAGE_PSE); 234} 235 236static inline pte_t pte_mkglobal(pte_t pte) 237{ 238 return pte_set_flags(pte, _PAGE_GLOBAL); 239} 240 241static inline pte_t pte_clrglobal(pte_t pte) 242{ 243 return pte_clear_flags(pte, _PAGE_GLOBAL); 244} 245 246static inline pte_t pte_mkspecial(pte_t pte) 247{ 248 return pte_set_flags(pte, _PAGE_SPECIAL); 249} 250 251static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 252{ 253 pmdval_t v = native_pmd_val(pmd); 254 255 return __pmd(v | set); 256} 257 258static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 259{ 260 pmdval_t v = native_pmd_val(pmd); 261 262 return __pmd(v & ~clear); 263} 264 265static inline pmd_t pmd_mkold(pmd_t pmd) 266{ 267 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 268} 269 270static inline pmd_t pmd_wrprotect(pmd_t pmd) 271{ 272 return pmd_clear_flags(pmd, _PAGE_RW); 273} 274 275static inline pmd_t pmd_mkdirty(pmd_t pmd) 276{ 277 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 278} 279 280static inline pmd_t pmd_mkhuge(pmd_t pmd) 281{ 282 return pmd_set_flags(pmd, _PAGE_PSE); 283} 284 285static inline pmd_t pmd_mkyoung(pmd_t pmd) 286{ 287 return pmd_set_flags(pmd, _PAGE_ACCESSED); 288} 289 290static inline pmd_t pmd_mkwrite(pmd_t pmd) 291{ 292 return pmd_set_flags(pmd, _PAGE_RW); 293} 294 295static inline pmd_t pmd_mknotpresent(pmd_t pmd) 296{ 297 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE); 298} 299 300#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 301static inline int pte_soft_dirty(pte_t pte) 302{ 303 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 304} 305 306static inline int pmd_soft_dirty(pmd_t pmd) 307{ 308 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 309} 310 311static inline pte_t pte_mksoft_dirty(pte_t pte) 312{ 313 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 314} 315 316static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 317{ 318 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 319} 320 321#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 322 323/* 324 * Mask out unsupported bits in a present pgprot. Non-present pgprots 325 * can use those bits for other purposes, so leave them be. 326 */ 327static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 328{ 329 pgprotval_t protval = pgprot_val(pgprot); 330 331 if (protval & _PAGE_PRESENT) 332 protval &= __supported_pte_mask; 333 334 return protval; 335} 336 337static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 338{ 339 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | 340 massage_pgprot(pgprot)); 341} 342 343static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 344{ 345 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | 346 massage_pgprot(pgprot)); 347} 348 349static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 350{ 351 pteval_t val = pte_val(pte); 352 353 /* 354 * Chop off the NX bit (if present), and add the NX portion of 355 * the newprot (if present): 356 */ 357 val &= _PAGE_CHG_MASK; 358 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK; 359 360 return __pte(val); 361} 362 363static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 364{ 365 pmdval_t val = pmd_val(pmd); 366 367 val &= _HPAGE_CHG_MASK; 368 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK; 369 370 return __pmd(val); 371} 372 373/* mprotect needs to preserve PAT bits when updating vm_page_prot */ 374#define pgprot_modify pgprot_modify 375static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 376{ 377 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 378 pgprotval_t addbits = pgprot_val(newprot); 379 return __pgprot(preservebits | addbits); 380} 381 382#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK) 383 384#define canon_pgprot(p) __pgprot(massage_pgprot(p)) 385 386static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 387 enum page_cache_mode pcm, 388 enum page_cache_mode new_pcm) 389{ 390 /* 391 * PAT type is always WB for untracked ranges, so no need to check. 392 */ 393 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 394 return 1; 395 396 /* 397 * Certain new memtypes are not allowed with certain 398 * requested memtype: 399 * - request is uncached, return cannot be write-back 400 * - request is write-combine, return cannot be write-back 401 * - request is write-through, return cannot be write-back 402 * - request is write-through, return cannot be write-combine 403 */ 404 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 405 new_pcm == _PAGE_CACHE_MODE_WB) || 406 (pcm == _PAGE_CACHE_MODE_WC && 407 new_pcm == _PAGE_CACHE_MODE_WB) || 408 (pcm == _PAGE_CACHE_MODE_WT && 409 new_pcm == _PAGE_CACHE_MODE_WB) || 410 (pcm == _PAGE_CACHE_MODE_WT && 411 new_pcm == _PAGE_CACHE_MODE_WC)) { 412 return 0; 413 } 414 415 return 1; 416} 417 418pmd_t *populate_extra_pmd(unsigned long vaddr); 419pte_t *populate_extra_pte(unsigned long vaddr); 420#endif /* __ASSEMBLY__ */ 421 422#ifdef CONFIG_X86_32 423# include <asm/pgtable_32.h> 424#else 425# include <asm/pgtable_64.h> 426#endif 427 428#ifndef __ASSEMBLY__ 429#include <linux/mm_types.h> 430#include <linux/mmdebug.h> 431#include <linux/log2.h> 432 433static inline int pte_none(pte_t pte) 434{ 435 return !pte.pte; 436} 437 438#define __HAVE_ARCH_PTE_SAME 439static inline int pte_same(pte_t a, pte_t b) 440{ 441 return a.pte == b.pte; 442} 443 444static inline int pte_present(pte_t a) 445{ 446 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 447} 448 449#define pte_accessible pte_accessible 450static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 451{ 452 if (pte_flags(a) & _PAGE_PRESENT) 453 return true; 454 455 if ((pte_flags(a) & _PAGE_PROTNONE) && 456 mm_tlb_flush_pending(mm)) 457 return true; 458 459 return false; 460} 461 462static inline int pte_hidden(pte_t pte) 463{ 464 return pte_flags(pte) & _PAGE_HIDDEN; 465} 466 467static inline int pmd_present(pmd_t pmd) 468{ 469 /* 470 * Checking for _PAGE_PSE is needed too because 471 * split_huge_page will temporarily clear the present bit (but 472 * the _PAGE_PSE flag will remain set at all times while the 473 * _PAGE_PRESENT bit is clear). 474 */ 475 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 476} 477 478#ifdef CONFIG_NUMA_BALANCING 479/* 480 * These work without NUMA balancing but the kernel does not care. See the 481 * comment in include/asm-generic/pgtable.h 482 */ 483static inline int pte_protnone(pte_t pte) 484{ 485 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 486 == _PAGE_PROTNONE; 487} 488 489static inline int pmd_protnone(pmd_t pmd) 490{ 491 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 492 == _PAGE_PROTNONE; 493} 494#endif /* CONFIG_NUMA_BALANCING */ 495 496static inline int pmd_none(pmd_t pmd) 497{ 498 /* Only check low word on 32-bit platforms, since it might be 499 out of sync with upper half. */ 500 return (unsigned long)native_pmd_val(pmd) == 0; 501} 502 503static inline unsigned long pmd_page_vaddr(pmd_t pmd) 504{ 505 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK); 506} 507 508/* 509 * Currently stuck as a macro due to indirect forward reference to 510 * linux/mmzone.h's __section_mem_map_addr() definition: 511 */ 512#define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT) 513 514/* 515 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] 516 * 517 * this macro returns the index of the entry in the pmd page which would 518 * control the given virtual address 519 */ 520static inline unsigned long pmd_index(unsigned long address) 521{ 522 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 523} 524 525/* 526 * Conversion functions: convert a page and protection to a page entry, 527 * and a page entry and page directory to the page they refer to. 528 * 529 * (Currently stuck as a macro because of indirect forward reference 530 * to linux/mm.h:page_to_nid()) 531 */ 532#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 533 534/* 535 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] 536 * 537 * this function returns the index of the entry in the pte page which would 538 * control the given virtual address 539 */ 540static inline unsigned long pte_index(unsigned long address) 541{ 542 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 543} 544 545static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 546{ 547 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 548} 549 550static inline int pmd_bad(pmd_t pmd) 551{ 552 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; 553} 554 555static inline unsigned long pages_to_mb(unsigned long npg) 556{ 557 return npg >> (20 - PAGE_SHIFT); 558} 559 560#if CONFIG_PGTABLE_LEVELS > 2 561static inline int pud_none(pud_t pud) 562{ 563 return native_pud_val(pud) == 0; 564} 565 566static inline int pud_present(pud_t pud) 567{ 568 return pud_flags(pud) & _PAGE_PRESENT; 569} 570 571static inline unsigned long pud_page_vaddr(pud_t pud) 572{ 573 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK); 574} 575 576/* 577 * Currently stuck as a macro due to indirect forward reference to 578 * linux/mmzone.h's __section_mem_map_addr() definition: 579 */ 580#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT) 581 582/* Find an entry in the second-level page table.. */ 583static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 584{ 585 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); 586} 587 588static inline int pud_large(pud_t pud) 589{ 590 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 591 (_PAGE_PSE | _PAGE_PRESENT); 592} 593 594static inline int pud_bad(pud_t pud) 595{ 596 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 597} 598#else 599static inline int pud_large(pud_t pud) 600{ 601 return 0; 602} 603#endif /* CONFIG_PGTABLE_LEVELS > 2 */ 604 605#if CONFIG_PGTABLE_LEVELS > 3 606static inline int pgd_present(pgd_t pgd) 607{ 608 return pgd_flags(pgd) & _PAGE_PRESENT; 609} 610 611static inline unsigned long pgd_page_vaddr(pgd_t pgd) 612{ 613 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 614} 615 616/* 617 * Currently stuck as a macro due to indirect forward reference to 618 * linux/mmzone.h's __section_mem_map_addr() definition: 619 */ 620#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT) 621 622/* to find an entry in a page-table-directory. */ 623static inline unsigned long pud_index(unsigned long address) 624{ 625 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 626} 627 628static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) 629{ 630 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address); 631} 632 633static inline int pgd_bad(pgd_t pgd) 634{ 635 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; 636} 637 638static inline int pgd_none(pgd_t pgd) 639{ 640 return !native_pgd_val(pgd); 641} 642#endif /* CONFIG_PGTABLE_LEVELS > 3 */ 643 644#endif /* __ASSEMBLY__ */ 645 646/* 647 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] 648 * 649 * this macro returns the index of the entry in the pgd page which would 650 * control the given virtual address 651 */ 652#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 653 654/* 655 * pgd_offset() returns a (pgd_t *) 656 * pgd_index() is used get the offset into the pgd page's array of pgd_t's; 657 */ 658#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) 659/* 660 * a shortcut which implies the use of the kernel's pgd, instead 661 * of a process's 662 */ 663#define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 664 665 666#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 667#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 668 669#ifndef __ASSEMBLY__ 670 671extern int direct_gbpages; 672void init_mem_mapping(void); 673void early_alloc_pgt_buf(void); 674 675/* local pte updates need not use xchg for locking */ 676static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 677{ 678 pte_t res = *ptep; 679 680 /* Pure native function needs no input for mm, addr */ 681 native_pte_clear(NULL, 0, ptep); 682 return res; 683} 684 685static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 686{ 687 pmd_t res = *pmdp; 688 689 native_pmd_clear(pmdp); 690 return res; 691} 692 693static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, 694 pte_t *ptep , pte_t pte) 695{ 696 native_set_pte(ptep, pte); 697} 698 699static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr, 700 pmd_t *pmdp , pmd_t pmd) 701{ 702 native_set_pmd(pmdp, pmd); 703} 704 705#ifndef CONFIG_PARAVIRT 706/* 707 * Rules for using pte_update - it must be called after any PTE update which 708 * has not been done using the set_pte / clear_pte interfaces. It is used by 709 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE 710 * updates should either be sets, clears, or set_pte_atomic for P->P 711 * transitions, which means this hook should only be called for user PTEs. 712 * This hook implies a P->P protection or access change has taken place, which 713 * requires a subsequent TLB flush. The notification can optionally be delayed 714 * until the TLB flush event by using the pte_update_defer form of the 715 * interface, but care must be taken to assure that the flush happens while 716 * still holding the same page table lock so that the shadow and primary pages 717 * do not become out of sync on SMP. 718 */ 719#define pte_update(mm, addr, ptep) do { } while (0) 720#define pte_update_defer(mm, addr, ptep) do { } while (0) 721#endif 722 723/* 724 * We only update the dirty/accessed state if we set 725 * the dirty bit by hand in the kernel, since the hardware 726 * will do the accessed bit for us, and we don't want to 727 * race with other CPU's that might be updating the dirty 728 * bit at the same time. 729 */ 730struct vm_area_struct; 731 732#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 733extern int ptep_set_access_flags(struct vm_area_struct *vma, 734 unsigned long address, pte_t *ptep, 735 pte_t entry, int dirty); 736 737#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 738extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 739 unsigned long addr, pte_t *ptep); 740 741#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 742extern int ptep_clear_flush_young(struct vm_area_struct *vma, 743 unsigned long address, pte_t *ptep); 744 745#define __HAVE_ARCH_PTEP_GET_AND_CLEAR 746static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 747 pte_t *ptep) 748{ 749 pte_t pte = native_ptep_get_and_clear(ptep); 750 pte_update(mm, addr, ptep); 751 return pte; 752} 753 754#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 755static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 756 unsigned long addr, pte_t *ptep, 757 int full) 758{ 759 pte_t pte; 760 if (full) { 761 /* 762 * Full address destruction in progress; paravirt does not 763 * care about updates and native needs no locking 764 */ 765 pte = native_local_ptep_get_and_clear(ptep); 766 } else { 767 pte = ptep_get_and_clear(mm, addr, ptep); 768 } 769 return pte; 770} 771 772#define __HAVE_ARCH_PTEP_SET_WRPROTECT 773static inline void ptep_set_wrprotect(struct mm_struct *mm, 774 unsigned long addr, pte_t *ptep) 775{ 776 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); 777 pte_update(mm, addr, ptep); 778} 779 780#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) 781 782#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 783 784#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 785extern int pmdp_set_access_flags(struct vm_area_struct *vma, 786 unsigned long address, pmd_t *pmdp, 787 pmd_t entry, int dirty); 788 789#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 790extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 791 unsigned long addr, pmd_t *pmdp); 792 793#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 794extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 795 unsigned long address, pmd_t *pmdp); 796 797 798#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH 799extern void pmdp_splitting_flush(struct vm_area_struct *vma, 800 unsigned long addr, pmd_t *pmdp); 801 802#define __HAVE_ARCH_PMD_WRITE 803static inline int pmd_write(pmd_t pmd) 804{ 805 return pmd_flags(pmd) & _PAGE_RW; 806} 807 808#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 809static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 810 pmd_t *pmdp) 811{ 812 pmd_t pmd = native_pmdp_get_and_clear(pmdp); 813 pmd_update(mm, addr, pmdp); 814 return pmd; 815} 816 817#define __HAVE_ARCH_PMDP_SET_WRPROTECT 818static inline void pmdp_set_wrprotect(struct mm_struct *mm, 819 unsigned long addr, pmd_t *pmdp) 820{ 821 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); 822 pmd_update(mm, addr, pmdp); 823} 824 825/* 826 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 827 * 828 * dst - pointer to pgd range anwhere on a pgd page 829 * src - "" 830 * count - the number of pgds to copy. 831 * 832 * dst and src can be on the same page, but the range must not overlap, 833 * and must not cross a page boundary. 834 */ 835static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 836{ 837 memcpy(dst, src, count * sizeof(pgd_t)); 838} 839 840#define PTE_SHIFT ilog2(PTRS_PER_PTE) 841static inline int page_level_shift(enum pg_level level) 842{ 843 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 844} 845static inline unsigned long page_level_size(enum pg_level level) 846{ 847 return 1UL << page_level_shift(level); 848} 849static inline unsigned long page_level_mask(enum pg_level level) 850{ 851 return ~(page_level_size(level) - 1); 852} 853 854/* 855 * The x86 doesn't have any external MMU info: the kernel page 856 * tables contain all the necessary information. 857 */ 858static inline void update_mmu_cache(struct vm_area_struct *vma, 859 unsigned long addr, pte_t *ptep) 860{ 861} 862static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 863 unsigned long addr, pmd_t *pmd) 864{ 865} 866 867#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 868static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 869{ 870 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 871} 872 873static inline int pte_swp_soft_dirty(pte_t pte) 874{ 875 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 876} 877 878static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 879{ 880 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 881} 882#endif 883 884#include <asm-generic/pgtable.h> 885#endif /* __ASSEMBLY__ */ 886 887#endif /* _ASM_X86_PGTABLE_H */