tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1Qualcomm adreno/snapdragon hdmi output
2
3Required properties:
4- compatible: one of the following
5 * "qcom,hdmi-tx-8994"
6 * "qcom,hdmi-tx-8084"
7 * "qcom,hdmi-tx-8974"
8 * "qcom,hdmi-tx-8660"
9 * "qcom,hdmi-tx-8960"
10- reg: Physical base address and length of the controller's registers
11- reg-names: "core_physical"
12- interrupts: The interrupt signal from the hdmi block.
13- clocks: device clocks
14 See ../clocks/clock-bindings.txt for details.
15- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
16- qcom,hdmi-tx-ddc-data-gpio: ddc data pin
17- qcom,hdmi-tx-hpd-gpio: hpd pin
18- core-vdda-supply: phandle to supply regulator
19- hdmi-mux-supply: phandle to mux regulator
20
21Optional properties:
22- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
23- qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
24- pinctrl-names: the pin control state names; should contain "default"
25- pinctrl-0: the default pinctrl state (active)
26- pinctrl-1: the "sleep" pinctrl state
27
28Example:
29
30/ {
31 ...
32
33 hdmi: qcom,hdmi-tx-8960@4a00000 {
34 compatible = "qcom,hdmi-tx-8960";
35 reg-names = "core_physical";
36 reg = <0x04a00000 0x1000>;
37 interrupts = <GIC_SPI 79 0>;
38 clock-names =
39 "core_clk",
40 "master_iface_clk",
41 "slave_iface_clk";
42 clocks =
43 <&mmcc HDMI_APP_CLK>,
44 <&mmcc HDMI_M_AHB_CLK>,
45 <&mmcc HDMI_S_AHB_CLK>;
46 qcom,hdmi-tx-ddc-clk = <&msmgpio 70 GPIO_ACTIVE_HIGH>;
47 qcom,hdmi-tx-ddc-data = <&msmgpio 71 GPIO_ACTIVE_HIGH>;
48 qcom,hdmi-tx-hpd = <&msmgpio 72 GPIO_ACTIVE_HIGH>;
49 core-vdda-supply = <&pm8921_hdmi_mvs>;
50 hdmi-mux-supply = <&ext_3p3v>;
51 pinctrl-names = "default", "sleep";
52 pinctrl-0 = <&hpd_active &ddc_active &cec_active>;
53 pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;
54 };
55};