tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * PCIe host controller driver for Freescale Layerscape SoCs
3 *
4 * Copyright (C) 2014 Freescale Semiconductor.
5 *
6 * Author: Minghuan Lian <Minghuan.Lian@freescale.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16#include <linux/module.h>
17#include <linux/of_pci.h>
18#include <linux/of_platform.h>
19#include <linux/of_irq.h>
20#include <linux/of_address.h>
21#include <linux/pci.h>
22#include <linux/platform_device.h>
23#include <linux/resource.h>
24#include <linux/mfd/syscon.h>
25#include <linux/regmap.h>
26
27#include "pcie-designware.h"
28
29/* PEX1/2 Misc Ports Status Register */
30#define SCFG_PEXMSCPORTSR(pex_idx) (0x94 + (pex_idx) * 4)
31#define LTSSM_STATE_SHIFT 20
32#define LTSSM_STATE_MASK 0x3f
33#define LTSSM_PCIE_L0 0x11 /* L0 state */
34
35/* Symbol Timer Register and Filter Mask Register 1 */
36#define PCIE_STRFMR1 0x71c
37
38struct ls_pcie {
39 struct list_head node;
40 struct device *dev;
41 struct pci_bus *bus;
42 void __iomem *dbi;
43 struct regmap *scfg;
44 struct pcie_port pp;
45 int index;
46 int msi_irq;
47};
48
49#define to_ls_pcie(x) container_of(x, struct ls_pcie, pp)
50
51static int ls_pcie_link_up(struct pcie_port *pp)
52{
53 u32 state;
54 struct ls_pcie *pcie = to_ls_pcie(pp);
55
56 regmap_read(pcie->scfg, SCFG_PEXMSCPORTSR(pcie->index), &state);
57 state = (state >> LTSSM_STATE_SHIFT) & LTSSM_STATE_MASK;
58
59 if (state < LTSSM_PCIE_L0)
60 return 0;
61
62 return 1;
63}
64
65static int ls_pcie_establish_link(struct pcie_port *pp)
66{
67 unsigned int retries;
68
69 for (retries = 0; retries < 200; retries++) {
70 if (dw_pcie_link_up(pp))
71 return 0;
72 usleep_range(100, 1000);
73 }
74
75 dev_err(pp->dev, "phy link never came up\n");
76 return -EINVAL;
77}
78
79static void ls_pcie_host_init(struct pcie_port *pp)
80{
81 struct ls_pcie *pcie = to_ls_pcie(pp);
82 u32 val;
83
84 dw_pcie_setup_rc(pp);
85 ls_pcie_establish_link(pp);
86
87 /*
88 * LS1021A Workaround for internal TKT228622
89 * to fix the INTx hang issue
90 */
91 val = ioread32(pcie->dbi + PCIE_STRFMR1);
92 val &= 0xffff;
93 iowrite32(val, pcie->dbi + PCIE_STRFMR1);
94}
95
96static struct pcie_host_ops ls_pcie_host_ops = {
97 .link_up = ls_pcie_link_up,
98 .host_init = ls_pcie_host_init,
99};
100
101static int ls_add_pcie_port(struct ls_pcie *pcie)
102{
103 struct pcie_port *pp;
104 int ret;
105
106 pp = &pcie->pp;
107 pp->dev = pcie->dev;
108 pp->dbi_base = pcie->dbi;
109 pp->root_bus_nr = -1;
110 pp->ops = &ls_pcie_host_ops;
111
112 ret = dw_pcie_host_init(pp);
113 if (ret) {
114 dev_err(pp->dev, "failed to initialize host\n");
115 return ret;
116 }
117
118 return 0;
119}
120
121static int __init ls_pcie_probe(struct platform_device *pdev)
122{
123 struct ls_pcie *pcie;
124 struct resource *dbi_base;
125 u32 index[2];
126 int ret;
127
128 pcie = devm_kzalloc(&pdev->dev, sizeof(*pcie), GFP_KERNEL);
129 if (!pcie)
130 return -ENOMEM;
131
132 pcie->dev = &pdev->dev;
133
134 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
135 pcie->dbi = devm_ioremap_resource(&pdev->dev, dbi_base);
136 if (IS_ERR(pcie->dbi)) {
137 dev_err(&pdev->dev, "missing *regs* space\n");
138 return PTR_ERR(pcie->dbi);
139 }
140
141 pcie->scfg = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
142 "fsl,pcie-scfg");
143 if (IS_ERR(pcie->scfg)) {
144 dev_err(&pdev->dev, "No syscfg phandle specified\n");
145 return PTR_ERR(pcie->scfg);
146 }
147
148 ret = of_property_read_u32_array(pdev->dev.of_node,
149 "fsl,pcie-scfg", index, 2);
150 if (ret)
151 return ret;
152 pcie->index = index[1];
153
154 ret = ls_add_pcie_port(pcie);
155 if (ret < 0)
156 return ret;
157
158 platform_set_drvdata(pdev, pcie);
159
160 return 0;
161}
162
163static const struct of_device_id ls_pcie_of_match[] = {
164 { .compatible = "fsl,ls1021a-pcie" },
165 { },
166};
167MODULE_DEVICE_TABLE(of, ls_pcie_of_match);
168
169static struct platform_driver ls_pcie_driver = {
170 .driver = {
171 .name = "layerscape-pcie",
172 .of_match_table = ls_pcie_of_match,
173 },
174};
175
176module_platform_driver_probe(ls_pcie_driver, ls_pcie_probe);
177
178MODULE_AUTHOR("Minghuan Lian <Minghuan.Lian@freescale.com>");
179MODULE_DESCRIPTION("Freescale Layerscape PCIe host controller driver");
180MODULE_LICENSE("GPL v2");