tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1/*
2 * Device Tree Source for UniPhier PH1-Pro4 SoC
3 *
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45/include/ "skeleton.dtsi"
46
47/ {
48 compatible = "socionext,ph1-pro4";
49
50 cpus {
51 #address-cells = <1>;
52 #size-cells = <0>;
53 enable-method = "socionext,uniphier-smp";
54
55 cpu@0 {
56 device_type = "cpu";
57 compatible = "arm,cortex-a9";
58 reg = <0>;
59 };
60
61 cpu@1 {
62 device_type = "cpu";
63 compatible = "arm,cortex-a9";
64 reg = <1>;
65 };
66 };
67
68 clocks {
69 arm_timer_clk: arm_timer_clk {
70 #clock-cells = <0>;
71 compatible = "fixed-clock";
72 clock-frequency = <50000000>;
73 };
74
75 uart_clk: uart_clk {
76 #clock-cells = <0>;
77 compatible = "fixed-clock";
78 clock-frequency = <73728000>;
79 };
80
81 i2c_clk: i2c_clk {
82 #clock-cells = <0>;
83 compatible = "fixed-clock";
84 clock-frequency = <50000000>;
85 };
86 };
87
88 soc {
89 compatible = "simple-bus";
90 #address-cells = <1>;
91 #size-cells = <1>;
92 ranges;
93 interrupt-parent = <&intc>;
94
95 extbus: extbus {
96 compatible = "simple-bus";
97 #address-cells = <2>;
98 #size-cells = <1>;
99 };
100
101 serial0: serial@54006800 {
102 compatible = "socionext,uniphier-uart";
103 status = "disabled";
104 reg = <0x54006800 0x40>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_uart0>;
107 interrupts = <0 33 4>;
108 clocks = <&uart_clk>;
109 fifo-size = <64>;
110 };
111
112 serial1: serial@54006900 {
113 compatible = "socionext,uniphier-uart";
114 status = "disabled";
115 reg = <0x54006900 0x40>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_uart1>;
118 interrupts = <0 35 4>;
119 clocks = <&uart_clk>;
120 fifo-size = <64>;
121 };
122
123 serial2: serial@54006a00 {
124 compatible = "socionext,uniphier-uart";
125 status = "disabled";
126 reg = <0x54006a00 0x40>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_uart2>;
129 interrupts = <0 37 4>;
130 clocks = <&uart_clk>;
131 fifo-size = <64>;
132 };
133
134 serial3: serial@54006b00 {
135 compatible = "socionext,uniphier-uart";
136 status = "disabled";
137 reg = <0x54006b00 0x40>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_uart3>;
140 interrupts = <0 29 4>;
141 clocks = <&uart_clk>;
142 fifo-size = <64>;
143 };
144
145 i2c0: i2c@58780000 {
146 compatible = "socionext,uniphier-fi2c";
147 status = "disabled";
148 reg = <0x58780000 0x80>;
149 #address-cells = <1>;
150 #size-cells = <0>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_i2c0>;
153 interrupts = <0 41 4>;
154 clocks = <&i2c_clk>;
155 clock-frequency = <100000>;
156 };
157
158 i2c1: i2c@58781000 {
159 compatible = "socionext,uniphier-fi2c";
160 status = "disabled";
161 reg = <0x58781000 0x80>;
162 #address-cells = <1>;
163 #size-cells = <0>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_i2c1>;
166 interrupts = <0 42 4>;
167 clocks = <&i2c_clk>;
168 clock-frequency = <100000>;
169 };
170
171 i2c2: i2c@58782000 {
172 compatible = "socionext,uniphier-fi2c";
173 status = "disabled";
174 reg = <0x58782000 0x80>;
175 #address-cells = <1>;
176 #size-cells = <0>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_i2c2>;
179 interrupts = <0 43 4>;
180 clocks = <&i2c_clk>;
181 clock-frequency = <100000>;
182 };
183
184 i2c3: i2c@58783000 {
185 compatible = "socionext,uniphier-fi2c";
186 status = "disabled";
187 reg = <0x58783000 0x80>;
188 #address-cells = <1>;
189 #size-cells = <0>;
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_i2c3>;
192 interrupts = <0 44 4>;
193 clocks = <&i2c_clk>;
194 clock-frequency = <100000>;
195 };
196
197 /* i2c4 does not exist */
198
199 /* chip-internal connection for DMD */
200 i2c5: i2c@58785000 {
201 compatible = "socionext,uniphier-fi2c";
202 reg = <0x58785000 0x80>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205 interrupts = <0 25 4>;
206 clocks = <&i2c_clk>;
207 clock-frequency = <400000>;
208 };
209
210 /* chip-internal connection for HDMI */
211 i2c6: i2c@58786000 {
212 compatible = "socionext,uniphier-fi2c";
213 reg = <0x58786000 0x80>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216 interrupts = <0 26 4>;
217 clocks = <&i2c_clk>;
218 clock-frequency = <400000>;
219 };
220
221 system-bus-controller-misc@59800000 {
222 compatible = "socionext,uniphier-system-bus-controller-misc",
223 "syscon";
224 reg = <0x59800000 0x2000>;
225 };
226
227 usb2: usb@5a800100 {
228 compatible = "socionext,uniphier-ehci", "generic-ehci";
229 status = "disabled";
230 reg = <0x5a800100 0x100>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&pinctrl_usb2>;
233 interrupts = <0 80 4>;
234 };
235
236 usb3: usb@5a810100 {
237 compatible = "socionext,uniphier-ehci", "generic-ehci";
238 status = "disabled";
239 reg = <0x5a810100 0x100>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_usb3>;
242 interrupts = <0 81 4>;
243 };
244
245 pinctrl: pinctrl@5f801000 {
246 compatible = "socionext,ph1-pro4-pinctrl",
247 "syscon";
248 reg = <0x5f801000 0xe00>;
249 };
250
251 timer@60000200 {
252 compatible = "arm,cortex-a9-global-timer";
253 reg = <0x60000200 0x20>;
254 interrupts = <1 11 0x304>;
255 clocks = <&arm_timer_clk>;
256 };
257
258 timer@60000600 {
259 compatible = "arm,cortex-a9-twd-timer";
260 reg = <0x60000600 0x20>;
261 interrupts = <1 13 0x304>;
262 clocks = <&arm_timer_clk>;
263 };
264
265 intc: interrupt-controller@60001000 {
266 compatible = "arm,cortex-a9-gic";
267 #interrupt-cells = <3>;
268 interrupt-controller;
269 reg = <0x60001000 0x1000>,
270 <0x60000100 0x100>;
271 };
272 };
273};
274
275/include/ "uniphier-pinctrl.dtsi"