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1* Renesas Electronics Ethernet AVB
2
3This file provides information on what the device node for the Ethernet AVB
4interface contains.
5
6Required properties:
7- compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC.
8 "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC.
9- reg: offset and length of (1) the register block and (2) the stream buffer.
10- interrupts: interrupt specifier for the sole interrupt.
11- phy-mode: see ethernet.txt file in the same directory.
12- phy-handle: see ethernet.txt file in the same directory.
13- #address-cells: number of address cells for the MDIO bus, must be equal to 1.
14- #size-cells: number of size cells on the MDIO bus, must be equal to 0.
15- clocks: clock phandle and specifier pair.
16- pinctrl-0: phandle, referring to a default pin configuration node.
17
18Optional properties:
19- interrupt-parent: the phandle for the interrupt controller that services
20 interrupts for this device.
21- pinctrl-names: pin configuration state name ("default").
22- renesas,no-ether-link: boolean, specify when a board does not provide a proper
23 AVB_LINK signal.
24- renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is
25 active-low instead of normal active-high.
26
27Example:
28
29 ethernet@e6800000 {
30 compatible = "renesas,etheravb-r8a7790";
31 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
32 interrupt-parent = <&gic>;
33 interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
34 clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
35 phy-mode = "rmii";
36 phy-handle = <&phy0>;
37 pinctrl-0 = <ðer_pins>;
38 pinctrl-names = "default";
39 renesas,no-ether-link;
40 #address-cells = <1>;
41 #size-cells = <0>;
42
43 phy0: ethernet-phy@0 {
44 reg = <0>;
45 interrupt-parent = <&gpio2>;
46 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
47 };
48 };