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1/* 2 * omap_vout_vrfb.c 3 * 4 * Copyright (C) 2010 Texas Instruments. 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 * 10 */ 11 12#include <linux/sched.h> 13#include <linux/platform_device.h> 14#include <linux/videodev2.h> 15#include <linux/slab.h> 16 17#include <media/videobuf-dma-contig.h> 18#include <media/v4l2-device.h> 19 20#include <video/omapvrfb.h> 21 22#include "omap_voutdef.h" 23#include "omap_voutlib.h" 24#include "omap_vout_vrfb.h" 25 26#define OMAP_DMA_NO_DEVICE 0 27 28/* 29 * Function for allocating video buffers 30 */ 31static int omap_vout_allocate_vrfb_buffers(struct omap_vout_device *vout, 32 unsigned int *count, int startindex) 33{ 34 int i, j; 35 36 for (i = 0; i < *count; i++) { 37 if (!vout->smsshado_virt_addr[i]) { 38 vout->smsshado_virt_addr[i] = 39 omap_vout_alloc_buffer(vout->smsshado_size, 40 &vout->smsshado_phy_addr[i]); 41 } 42 if (!vout->smsshado_virt_addr[i] && startindex != -1) { 43 if (V4L2_MEMORY_MMAP == vout->memory && i >= startindex) 44 break; 45 } 46 if (!vout->smsshado_virt_addr[i]) { 47 for (j = 0; j < i; j++) { 48 omap_vout_free_buffer( 49 vout->smsshado_virt_addr[j], 50 vout->smsshado_size); 51 vout->smsshado_virt_addr[j] = 0; 52 vout->smsshado_phy_addr[j] = 0; 53 } 54 *count = 0; 55 return -ENOMEM; 56 } 57 memset((void *)(long)vout->smsshado_virt_addr[i], 0, 58 vout->smsshado_size); 59 } 60 return 0; 61} 62 63/* 64 * Wakes up the application once the DMA transfer to VRFB space is completed. 65 */ 66static void omap_vout_vrfb_dma_tx_callback(void *data) 67{ 68 struct vid_vrfb_dma *t = (struct vid_vrfb_dma *) data; 69 70 t->tx_status = 1; 71 wake_up_interruptible(&t->wait); 72} 73 74/* 75 * Free VRFB buffers 76 */ 77void omap_vout_free_vrfb_buffers(struct omap_vout_device *vout) 78{ 79 int j; 80 81 for (j = 0; j < VRFB_NUM_BUFS; j++) { 82 if (vout->smsshado_virt_addr[j]) { 83 omap_vout_free_buffer(vout->smsshado_virt_addr[j], 84 vout->smsshado_size); 85 vout->smsshado_virt_addr[j] = 0; 86 vout->smsshado_phy_addr[j] = 0; 87 } 88 } 89} 90 91int omap_vout_setup_vrfb_bufs(struct platform_device *pdev, int vid_num, 92 bool static_vrfb_allocation) 93{ 94 int ret = 0, i, j; 95 struct omap_vout_device *vout; 96 struct video_device *vfd; 97 dma_cap_mask_t mask; 98 int image_width, image_height; 99 int vrfb_num_bufs = VRFB_NUM_BUFS; 100 struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev); 101 struct omap2video_device *vid_dev = 102 container_of(v4l2_dev, struct omap2video_device, v4l2_dev); 103 104 vout = vid_dev->vouts[vid_num]; 105 vfd = vout->vfd; 106 107 for (i = 0; i < VRFB_NUM_BUFS; i++) { 108 if (omap_vrfb_request_ctx(&vout->vrfb_context[i])) { 109 dev_info(&pdev->dev, ": VRFB allocation failed\n"); 110 for (j = 0; j < i; j++) 111 omap_vrfb_release_ctx(&vout->vrfb_context[j]); 112 ret = -ENOMEM; 113 goto free_buffers; 114 } 115 } 116 117 /* Calculate VRFB memory size */ 118 /* allocate for worst case size */ 119 image_width = VID_MAX_WIDTH / TILE_SIZE; 120 if (VID_MAX_WIDTH % TILE_SIZE) 121 image_width++; 122 123 image_width = image_width * TILE_SIZE; 124 image_height = VID_MAX_HEIGHT / TILE_SIZE; 125 126 if (VID_MAX_HEIGHT % TILE_SIZE) 127 image_height++; 128 129 image_height = image_height * TILE_SIZE; 130 vout->smsshado_size = PAGE_ALIGN(image_width * image_height * 2 * 2); 131 132 /* 133 * Request and Initialize DMA, for DMA based VRFB transfer 134 */ 135 dma_cap_zero(mask); 136 dma_cap_set(DMA_INTERLEAVE, mask); 137 vout->vrfb_dma_tx.chan = dma_request_chan_by_mask(&mask); 138 if (IS_ERR(vout->vrfb_dma_tx.chan)) { 139 vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED; 140 } else { 141 size_t xt_size = sizeof(struct dma_interleaved_template) + 142 sizeof(struct data_chunk); 143 144 vout->vrfb_dma_tx.xt = kzalloc(xt_size, GFP_KERNEL); 145 if (!vout->vrfb_dma_tx.xt) { 146 dma_release_channel(vout->vrfb_dma_tx.chan); 147 vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED; 148 } 149 } 150 151 if (vout->vrfb_dma_tx.req_status == DMA_CHAN_NOT_ALLOTED) 152 dev_info(&pdev->dev, 153 ": failed to allocate DMA Channel for video%d\n", 154 vfd->minor); 155 156 init_waitqueue_head(&vout->vrfb_dma_tx.wait); 157 158 /* statically allocated the VRFB buffer is done through 159 commands line aruments */ 160 if (static_vrfb_allocation) { 161 if (omap_vout_allocate_vrfb_buffers(vout, &vrfb_num_bufs, -1)) { 162 ret = -ENOMEM; 163 goto release_vrfb_ctx; 164 } 165 vout->vrfb_static_allocation = true; 166 } 167 return 0; 168 169release_vrfb_ctx: 170 for (j = 0; j < VRFB_NUM_BUFS; j++) 171 omap_vrfb_release_ctx(&vout->vrfb_context[j]); 172free_buffers: 173 omap_vout_free_buffers(vout); 174 175 return ret; 176} 177 178/* 179 * Release the VRFB context once the module exits 180 */ 181void omap_vout_release_vrfb(struct omap_vout_device *vout) 182{ 183 int i; 184 185 for (i = 0; i < VRFB_NUM_BUFS; i++) 186 omap_vrfb_release_ctx(&vout->vrfb_context[i]); 187 188 if (vout->vrfb_dma_tx.req_status == DMA_CHAN_ALLOTED) { 189 vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED; 190 kfree(vout->vrfb_dma_tx.xt); 191 dmaengine_terminate_sync(vout->vrfb_dma_tx.chan); 192 dma_release_channel(vout->vrfb_dma_tx.chan); 193 } 194} 195 196/* 197 * Allocate the buffers for the VRFB space. Data is copied from V4L2 198 * buffers to the VRFB buffers using the DMA engine. 199 */ 200int omap_vout_vrfb_buffer_setup(struct omap_vout_device *vout, 201 unsigned int *count, unsigned int startindex) 202{ 203 int i; 204 bool yuv_mode; 205 206 if (!is_rotation_enabled(vout)) 207 return 0; 208 209 /* If rotation is enabled, allocate memory for VRFB space also */ 210 *count = *count > VRFB_NUM_BUFS ? VRFB_NUM_BUFS : *count; 211 212 /* Allocate the VRFB buffers only if the buffers are not 213 * allocated during init time. 214 */ 215 if (!vout->vrfb_static_allocation) 216 if (omap_vout_allocate_vrfb_buffers(vout, count, startindex)) 217 return -ENOMEM; 218 219 if (vout->dss_mode == OMAP_DSS_COLOR_YUV2 || 220 vout->dss_mode == OMAP_DSS_COLOR_UYVY) 221 yuv_mode = true; 222 else 223 yuv_mode = false; 224 225 for (i = 0; i < *count; i++) 226 omap_vrfb_setup(&vout->vrfb_context[i], 227 vout->smsshado_phy_addr[i], vout->pix.width, 228 vout->pix.height, vout->bpp, yuv_mode); 229 230 return 0; 231} 232 233int omap_vout_prepare_vrfb(struct omap_vout_device *vout, 234 struct videobuf_buffer *vb) 235{ 236 struct dma_async_tx_descriptor *tx; 237 enum dma_ctrl_flags flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK; 238 struct dma_chan *chan = vout->vrfb_dma_tx.chan; 239 struct dma_interleaved_template *xt = vout->vrfb_dma_tx.xt; 240 dma_cookie_t cookie; 241 enum dma_status status; 242 enum dss_rotation rotation; 243 size_t dst_icg; 244 u32 pixsize; 245 246 if (!is_rotation_enabled(vout)) 247 return 0; 248 249 /* If rotation is enabled, copy input buffer into VRFB 250 * memory space using DMA. We are copying input buffer 251 * into VRFB memory space of desired angle and DSS will 252 * read image VRFB memory for 0 degree angle 253 */ 254 255 pixsize = vout->bpp * vout->vrfb_bpp; 256 dst_icg = ((MAX_PIXELS_PER_LINE * pixsize) - 257 (vout->pix.width * vout->bpp)) + 1; 258 259 xt->src_start = vout->buf_phy_addr[vb->i]; 260 xt->dst_start = vout->vrfb_context[vb->i].paddr[0]; 261 262 xt->numf = vout->pix.height; 263 xt->frame_size = 1; 264 xt->sgl[0].size = vout->pix.width * vout->bpp; 265 xt->sgl[0].icg = dst_icg; 266 267 xt->dir = DMA_MEM_TO_MEM; 268 xt->src_sgl = false; 269 xt->src_inc = true; 270 xt->dst_sgl = true; 271 xt->dst_inc = true; 272 273 tx = dmaengine_prep_interleaved_dma(chan, xt, flags); 274 if (tx == NULL) { 275 pr_err("%s: DMA interleaved prep error\n", __func__); 276 return -EINVAL; 277 } 278 279 tx->callback = omap_vout_vrfb_dma_tx_callback; 280 tx->callback_param = &vout->vrfb_dma_tx; 281 282 cookie = dmaengine_submit(tx); 283 if (dma_submit_error(cookie)) { 284 pr_err("%s: dmaengine_submit failed (%d)\n", __func__, cookie); 285 return -EINVAL; 286 } 287 288 vout->vrfb_dma_tx.tx_status = 0; 289 dma_async_issue_pending(chan); 290 291 wait_event_interruptible_timeout(vout->vrfb_dma_tx.wait, 292 vout->vrfb_dma_tx.tx_status == 1, 293 VRFB_TX_TIMEOUT); 294 295 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); 296 297 if (vout->vrfb_dma_tx.tx_status == 0) { 298 pr_err("%s: Timeout while waiting for DMA\n", __func__); 299 dmaengine_terminate_sync(chan); 300 return -EINVAL; 301 } else if (status != DMA_COMPLETE) { 302 pr_err("%s: DMA completion %s status\n", __func__, 303 status == DMA_ERROR ? "error" : "busy"); 304 dmaengine_terminate_sync(chan); 305 return -EINVAL; 306 } 307 308 /* Store buffers physical address into an array. Addresses 309 * from this array will be used to configure DSS */ 310 rotation = calc_rotation(vout); 311 vout->queued_buf_addr[vb->i] = (u8 *) 312 vout->vrfb_context[vb->i].paddr[rotation]; 313 return 0; 314} 315 316/* 317 * Calculate the buffer offsets from which the streaming should 318 * start. This offset calculation is mainly required because of 319 * the VRFB 32 pixels alignment with rotation. 320 */ 321void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout) 322{ 323 enum dss_rotation rotation; 324 bool mirroring = vout->mirror; 325 struct v4l2_rect *crop = &vout->crop; 326 struct v4l2_pix_format *pix = &vout->pix; 327 int *cropped_offset = &vout->cropped_offset; 328 int vr_ps = 1, ps = 2, temp_ps = 2; 329 int offset = 0, ctop = 0, cleft = 0, line_length = 0; 330 331 rotation = calc_rotation(vout); 332 333 if (V4L2_PIX_FMT_YUYV == pix->pixelformat || 334 V4L2_PIX_FMT_UYVY == pix->pixelformat) { 335 if (is_rotation_enabled(vout)) { 336 /* 337 * ps - Actual pixel size for YUYV/UYVY for 338 * VRFB/Mirroring is 4 bytes 339 * vr_ps - Virtually pixel size for YUYV/UYVY is 340 * 2 bytes 341 */ 342 ps = 4; 343 vr_ps = 2; 344 } else { 345 ps = 2; /* otherwise the pixel size is 2 byte */ 346 } 347 } else if (V4L2_PIX_FMT_RGB32 == pix->pixelformat) { 348 ps = 4; 349 } else if (V4L2_PIX_FMT_RGB24 == pix->pixelformat) { 350 ps = 3; 351 } 352 vout->ps = ps; 353 vout->vr_ps = vr_ps; 354 355 if (is_rotation_enabled(vout)) { 356 line_length = MAX_PIXELS_PER_LINE; 357 ctop = (pix->height - crop->height) - crop->top; 358 cleft = (pix->width - crop->width) - crop->left; 359 } else { 360 line_length = pix->width; 361 } 362 vout->line_length = line_length; 363 switch (rotation) { 364 case dss_rotation_90_degree: 365 offset = vout->vrfb_context[0].yoffset * 366 vout->vrfb_context[0].bytespp; 367 temp_ps = ps / vr_ps; 368 if (!mirroring) { 369 *cropped_offset = offset + line_length * 370 temp_ps * cleft + crop->top * temp_ps; 371 } else { 372 *cropped_offset = offset + line_length * temp_ps * 373 cleft + crop->top * temp_ps + (line_length * 374 ((crop->width / (vr_ps)) - 1) * ps); 375 } 376 break; 377 case dss_rotation_180_degree: 378 offset = ((MAX_PIXELS_PER_LINE * vout->vrfb_context[0].yoffset * 379 vout->vrfb_context[0].bytespp) + 380 (vout->vrfb_context[0].xoffset * 381 vout->vrfb_context[0].bytespp)); 382 if (!mirroring) { 383 *cropped_offset = offset + (line_length * ps * ctop) + 384 (cleft / vr_ps) * ps; 385 386 } else { 387 *cropped_offset = offset + (line_length * ps * ctop) + 388 (cleft / vr_ps) * ps + (line_length * 389 (crop->height - 1) * ps); 390 } 391 break; 392 case dss_rotation_270_degree: 393 offset = MAX_PIXELS_PER_LINE * vout->vrfb_context[0].xoffset * 394 vout->vrfb_context[0].bytespp; 395 temp_ps = ps / vr_ps; 396 if (!mirroring) { 397 *cropped_offset = offset + line_length * 398 temp_ps * crop->left + ctop * ps; 399 } else { 400 *cropped_offset = offset + line_length * 401 temp_ps * crop->left + ctop * ps + 402 (line_length * ((crop->width / vr_ps) - 1) * 403 ps); 404 } 405 break; 406 case dss_rotation_0_degree: 407 if (!mirroring) { 408 *cropped_offset = (line_length * ps) * 409 crop->top + (crop->left / vr_ps) * ps; 410 } else { 411 *cropped_offset = (line_length * ps) * 412 crop->top + (crop->left / vr_ps) * ps + 413 (line_length * (crop->height - 1) * ps); 414 } 415 break; 416 default: 417 *cropped_offset = (line_length * ps * crop->top) / 418 vr_ps + (crop->left * ps) / vr_ps + 419 ((crop->width / vr_ps) - 1) * ps; 420 break; 421 } 422}