tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * PKUnity NAND Controller Registers
4 */
5/*
6 * ID Reg. 0 NAND_IDR0
7 */
8#define NAND_IDR0 (PKUNITY_NAND_BASE + 0x0000)
9/*
10 * ID Reg. 1 NAND_IDR1
11 */
12#define NAND_IDR1 (PKUNITY_NAND_BASE + 0x0004)
13/*
14 * ID Reg. 2 NAND_IDR2
15 */
16#define NAND_IDR2 (PKUNITY_NAND_BASE + 0x0008)
17/*
18 * ID Reg. 3 NAND_IDR3
19 */
20#define NAND_IDR3 (PKUNITY_NAND_BASE + 0x000C)
21/*
22 * Page Address Reg 0 NAND_PAR0
23 */
24#define NAND_PAR0 (PKUNITY_NAND_BASE + 0x0010)
25/*
26 * Page Address Reg 1 NAND_PAR1
27 */
28#define NAND_PAR1 (PKUNITY_NAND_BASE + 0x0014)
29/*
30 * Page Address Reg 2 NAND_PAR2
31 */
32#define NAND_PAR2 (PKUNITY_NAND_BASE + 0x0018)
33/*
34 * ECC Enable Reg NAND_ECCEN
35 */
36#define NAND_ECCEN (PKUNITY_NAND_BASE + 0x001C)
37/*
38 * Buffer Reg NAND_BUF
39 */
40#define NAND_BUF (PKUNITY_NAND_BASE + 0x0020)
41/*
42 * ECC Status Reg NAND_ECCSR
43 */
44#define NAND_ECCSR (PKUNITY_NAND_BASE + 0x0024)
45/*
46 * Command Reg NAND_CMD
47 */
48#define NAND_CMD (PKUNITY_NAND_BASE + 0x0028)
49/*
50 * DMA Configure Reg NAND_DMACR
51 */
52#define NAND_DMACR (PKUNITY_NAND_BASE + 0x002C)
53/*
54 * Interrupt Reg NAND_IR
55 */
56#define NAND_IR (PKUNITY_NAND_BASE + 0x0030)
57/*
58 * Interrupt Mask Reg NAND_IMR
59 */
60#define NAND_IMR (PKUNITY_NAND_BASE + 0x0034)
61/*
62 * Chip Enable Reg NAND_CHIPEN
63 */
64#define NAND_CHIPEN (PKUNITY_NAND_BASE + 0x0038)
65/*
66 * Address Reg NAND_ADDR
67 */
68#define NAND_ADDR (PKUNITY_NAND_BASE + 0x003C)
69
70/*
71 * Command bits NAND_CMD_CMD_MASK
72 */
73#define NAND_CMD_CMD_MASK FMASK(4, 4)
74#define NAND_CMD_CMD_READPAGE FIELD(0x0, 4, 4)
75#define NAND_CMD_CMD_ERASEBLOCK FIELD(0x6, 4, 4)
76#define NAND_CMD_CMD_READSTATUS FIELD(0x7, 4, 4)
77#define NAND_CMD_CMD_WRITEPAGE FIELD(0x8, 4, 4)
78#define NAND_CMD_CMD_READID FIELD(0x9, 4, 4)
79#define NAND_CMD_CMD_RESET FIELD(0xf, 4, 4)
80