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1QCOM Secure Channel Manager (SCM) 2 3Qualcomm processors include an interface to communicate to the secure firmware. 4This interface allows for clients to request different types of actions. These 5can include CPU power up/down, HDCP requests, loading of firmware, and other 6assorted actions. 7 8Required properties: 9- compatible: must contain one of the following: 10 * "qcom,scm-apq8064" 11 * "qcom,scm-apq8084" 12 * "qcom,scm-msm8660" 13 * "qcom,scm-msm8916" 14 * "qcom,scm-msm8960" 15 * "qcom,scm-msm8974" 16 * "qcom,scm-msm8996" 17 * "qcom,scm-msm8998" 18 * "qcom,scm-ipq4019" 19 * "qcom,scm-sdm845" 20 and: 21 * "qcom,scm" 22- clocks: Specifies clocks needed by the SCM interface, if any: 23 * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and 24 "qcom,scm-msm8960" 25 * core, iface and bus clocks required for "qcom,scm-apq8084", 26 "qcom,scm-msm8916" and "qcom,scm-msm8974" 27- clock-names: Must contain "core" for the core clock, "iface" for the interface 28 clock and "bus" for the bus clock per the requirements of the compatible. 29- qcom,dload-mode: phandle to the TCSR hardware block and offset of the 30 download mode control register (optional) 31 32Example for MSM8916: 33 34 firmware { 35 scm { 36 compatible = "qcom,msm8916", "qcom,scm"; 37 clocks = <&gcc GCC_CRYPTO_CLK> , 38 <&gcc GCC_CRYPTO_AXI_CLK>, 39 <&gcc GCC_CRYPTO_AHB_CLK>; 40 clock-names = "core", "bus", "iface"; 41 }; 42 };