tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
2 *
3 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include <linux/component.h>
12#include <linux/mfd/syscon.h>
13#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
14#include <drm/bridge/dw_hdmi.h>
15#include <video/imx-ipu-v3.h>
16#include <linux/regmap.h>
17#include <drm/drm_of.h>
18#include <drm/drmP.h>
19#include <drm/drm_crtc_helper.h>
20#include <drm/drm_edid.h>
21#include <drm/drm_encoder_slave.h>
22
23#include "imx-drm.h"
24
25struct imx_hdmi {
26 struct device *dev;
27 struct drm_encoder encoder;
28 struct dw_hdmi *hdmi;
29 struct regmap *regmap;
30};
31
32static inline struct imx_hdmi *enc_to_imx_hdmi(struct drm_encoder *e)
33{
34 return container_of(e, struct imx_hdmi, encoder);
35}
36
37static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
38 {
39 45250000, {
40 { 0x01e0, 0x0000 },
41 { 0x21e1, 0x0000 },
42 { 0x41e2, 0x0000 }
43 },
44 }, {
45 92500000, {
46 { 0x0140, 0x0005 },
47 { 0x2141, 0x0005 },
48 { 0x4142, 0x0005 },
49 },
50 }, {
51 148500000, {
52 { 0x00a0, 0x000a },
53 { 0x20a1, 0x000a },
54 { 0x40a2, 0x000a },
55 },
56 }, {
57 216000000, {
58 { 0x00a0, 0x000a },
59 { 0x2001, 0x000f },
60 { 0x4002, 0x000f },
61 },
62 }, {
63 ~0UL, {
64 { 0x0000, 0x0000 },
65 { 0x0000, 0x0000 },
66 { 0x0000, 0x0000 },
67 },
68 }
69};
70
71static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
72 /* pixelclk bpp8 bpp10 bpp12 */
73 {
74 54000000, { 0x091c, 0x091c, 0x06dc },
75 }, {
76 58400000, { 0x091c, 0x06dc, 0x06dc },
77 }, {
78 72000000, { 0x06dc, 0x06dc, 0x091c },
79 }, {
80 74250000, { 0x06dc, 0x0b5c, 0x091c },
81 }, {
82 118800000, { 0x091c, 0x091c, 0x06dc },
83 }, {
84 216000000, { 0x06dc, 0x0b5c, 0x091c },
85 }, {
86 ~0UL, { 0x0000, 0x0000, 0x0000 },
87 },
88};
89
90/*
91 * Resistance term 133Ohm Cfg
92 * PREEMP config 0.00
93 * TX/CK level 10
94 */
95static const struct dw_hdmi_phy_config imx_phy_config[] = {
96 /*pixelclk symbol term vlev */
97 { 216000000, 0x800d, 0x0005, 0x01ad},
98 { ~0UL, 0x0000, 0x0000, 0x0000}
99};
100
101static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
102{
103 struct device_node *np = hdmi->dev->of_node;
104
105 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
106 if (IS_ERR(hdmi->regmap)) {
107 dev_err(hdmi->dev, "Unable to get gpr\n");
108 return PTR_ERR(hdmi->regmap);
109 }
110
111 return 0;
112}
113
114static void dw_hdmi_imx_encoder_disable(struct drm_encoder *encoder)
115{
116}
117
118static void dw_hdmi_imx_encoder_enable(struct drm_encoder *encoder)
119{
120 struct imx_hdmi *hdmi = enc_to_imx_hdmi(encoder);
121 int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder);
122
123 regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
124 IMX6Q_GPR3_HDMI_MUX_CTL_MASK,
125 mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT);
126}
127
128static int dw_hdmi_imx_atomic_check(struct drm_encoder *encoder,
129 struct drm_crtc_state *crtc_state,
130 struct drm_connector_state *conn_state)
131{
132 struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
133
134 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
135 imx_crtc_state->di_hsync_pin = 2;
136 imx_crtc_state->di_vsync_pin = 3;
137
138 return 0;
139}
140
141static const struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = {
142 .enable = dw_hdmi_imx_encoder_enable,
143 .disable = dw_hdmi_imx_encoder_disable,
144 .atomic_check = dw_hdmi_imx_atomic_check,
145};
146
147static const struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = {
148 .destroy = drm_encoder_cleanup,
149};
150
151static enum drm_mode_status
152imx6q_hdmi_mode_valid(struct drm_connector *con,
153 const struct drm_display_mode *mode)
154{
155 if (mode->clock < 13500)
156 return MODE_CLOCK_LOW;
157 /* FIXME: Hardware is capable of 266MHz, but setup data is missing. */
158 if (mode->clock > 216000)
159 return MODE_CLOCK_HIGH;
160
161 return MODE_OK;
162}
163
164static enum drm_mode_status
165imx6dl_hdmi_mode_valid(struct drm_connector *con,
166 const struct drm_display_mode *mode)
167{
168 if (mode->clock < 13500)
169 return MODE_CLOCK_LOW;
170 /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */
171 if (mode->clock > 216000)
172 return MODE_CLOCK_HIGH;
173
174 return MODE_OK;
175}
176
177static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
178 .mpll_cfg = imx_mpll_cfg,
179 .cur_ctr = imx_cur_ctr,
180 .phy_config = imx_phy_config,
181 .mode_valid = imx6q_hdmi_mode_valid,
182};
183
184static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
185 .mpll_cfg = imx_mpll_cfg,
186 .cur_ctr = imx_cur_ctr,
187 .phy_config = imx_phy_config,
188 .mode_valid = imx6dl_hdmi_mode_valid,
189};
190
191static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
192 { .compatible = "fsl,imx6q-hdmi",
193 .data = &imx6q_hdmi_drv_data
194 }, {
195 .compatible = "fsl,imx6dl-hdmi",
196 .data = &imx6dl_hdmi_drv_data
197 },
198 {},
199};
200MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids);
201
202static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
203 void *data)
204{
205 struct platform_device *pdev = to_platform_device(dev);
206 const struct dw_hdmi_plat_data *plat_data;
207 const struct of_device_id *match;
208 struct drm_device *drm = data;
209 struct drm_encoder *encoder;
210 struct imx_hdmi *hdmi;
211 int ret;
212
213 if (!pdev->dev.of_node)
214 return -ENODEV;
215
216 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
217 if (!hdmi)
218 return -ENOMEM;
219
220 match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node);
221 plat_data = match->data;
222 hdmi->dev = &pdev->dev;
223 encoder = &hdmi->encoder;
224
225 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
226 /*
227 * If we failed to find the CRTC(s) which this encoder is
228 * supposed to be connected to, it's because the CRTC has
229 * not been registered yet. Defer probing, and hope that
230 * the required CRTC is added later.
231 */
232 if (encoder->possible_crtcs == 0)
233 return -EPROBE_DEFER;
234
235 ret = dw_hdmi_imx_parse_dt(hdmi);
236 if (ret < 0)
237 return ret;
238
239 drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs);
240 drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs,
241 DRM_MODE_ENCODER_TMDS, NULL);
242
243 platform_set_drvdata(pdev, hdmi);
244
245 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data);
246
247 /*
248 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
249 * which would have called the encoder cleanup. Do it manually.
250 */
251 if (IS_ERR(hdmi->hdmi)) {
252 ret = PTR_ERR(hdmi->hdmi);
253 drm_encoder_cleanup(encoder);
254 }
255
256 return ret;
257}
258
259static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
260 void *data)
261{
262 struct imx_hdmi *hdmi = dev_get_drvdata(dev);
263
264 dw_hdmi_unbind(hdmi->hdmi);
265}
266
267static const struct component_ops dw_hdmi_imx_ops = {
268 .bind = dw_hdmi_imx_bind,
269 .unbind = dw_hdmi_imx_unbind,
270};
271
272static int dw_hdmi_imx_probe(struct platform_device *pdev)
273{
274 return component_add(&pdev->dev, &dw_hdmi_imx_ops);
275}
276
277static int dw_hdmi_imx_remove(struct platform_device *pdev)
278{
279 component_del(&pdev->dev, &dw_hdmi_imx_ops);
280
281 return 0;
282}
283
284static struct platform_driver dw_hdmi_imx_platform_driver = {
285 .probe = dw_hdmi_imx_probe,
286 .remove = dw_hdmi_imx_remove,
287 .driver = {
288 .name = "dwhdmi-imx",
289 .of_match_table = dw_hdmi_imx_dt_ids,
290 },
291};
292
293module_platform_driver(dw_hdmi_imx_platform_driver);
294
295MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
296MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
297MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension");
298MODULE_LICENSE("GPL");
299MODULE_ALIAS("platform:dwhdmi-imx");