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1/*
2 * include/linux/fsl_devices.h
3 *
4 * Definitions for any platform device related flags or structures for
5 * Freescale processor devices
6 *
7 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
8 *
9 * Copyright 2004,2012 Freescale Semiconductor, Inc
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17#ifndef _FSL_DEVICE_H_
18#define _FSL_DEVICE_H_
19
20#define FSL_UTMI_PHY_DLY 10 /*As per P1010RM, delay for UTMI
21 PHY CLK to become stable - 10ms*/
22#define FSL_USB_PHY_CLK_TIMEOUT 10000 /* uSec */
23#define FSL_USB_VER_OLD 0
24#define FSL_USB_VER_1_6 1
25#define FSL_USB_VER_2_2 2
26#define FSL_USB_VER_2_4 3
27#define FSL_USB_VER_2_5 4
28
29#include <linux/types.h>
30
31/*
32 * Some conventions on how we handle peripherals on Freescale chips
33 *
34 * unique device: a platform_device entry in fsl_plat_devs[] plus
35 * associated device information in its platform_data structure.
36 *
37 * A chip is described by a set of unique devices.
38 *
39 * Each sub-arch has its own master list of unique devices and
40 * enumerates them by enum fsl_devices in a sub-arch specific header
41 *
42 * The platform data structure is broken into two parts. The
43 * first is device specific information that help identify any
44 * unique features of a peripheral. The second is any
45 * information that may be defined by the board or how the device
46 * is connected externally of the chip.
47 *
48 * naming conventions:
49 * - platform data structures: <driver>_platform_data
50 * - platform data device flags: FSL_<driver>_DEV_<FLAG>
51 * - platform data board flags: FSL_<driver>_BRD_<FLAG>
52 *
53 */
54
55enum fsl_usb2_operating_modes {
56 FSL_USB2_MPH_HOST,
57 FSL_USB2_DR_HOST,
58 FSL_USB2_DR_DEVICE,
59 FSL_USB2_DR_OTG,
60};
61
62enum fsl_usb2_phy_modes {
63 FSL_USB2_PHY_NONE,
64 FSL_USB2_PHY_ULPI,
65 FSL_USB2_PHY_UTMI,
66 FSL_USB2_PHY_UTMI_WIDE,
67 FSL_USB2_PHY_SERIAL,
68};
69
70struct clk;
71struct platform_device;
72
73struct fsl_usb2_platform_data {
74 /* board specific information */
75 int controller_ver;
76 enum fsl_usb2_operating_modes operating_mode;
77 enum fsl_usb2_phy_modes phy_mode;
78 unsigned int port_enables;
79 unsigned int workaround;
80
81 int (*init)(struct platform_device *);
82 void (*exit)(struct platform_device *);
83 void __iomem *regs; /* ioremap'd register base */
84 struct clk *clk;
85 unsigned power_budget; /* hcd->power_budget */
86 unsigned big_endian_mmio:1;
87 unsigned big_endian_desc:1;
88 unsigned es:1; /* need USBMODE:ES */
89 unsigned le_setup_buf:1;
90 unsigned have_sysif_regs:1;
91 unsigned invert_drvvbus:1;
92 unsigned invert_pwr_fault:1;
93
94 unsigned suspended:1;
95 unsigned already_suspended:1;
96
97 /* register save area for suspend/resume */
98 u32 pm_command;
99 u32 pm_status;
100 u32 pm_intr_enable;
101 u32 pm_frame_index;
102 u32 pm_segment;
103 u32 pm_frame_list;
104 u32 pm_async_next;
105 u32 pm_configured_flag;
106 u32 pm_portsc;
107 u32 pm_usbgenctrl;
108};
109
110/* Flags in fsl_usb2_mph_platform_data */
111#define FSL_USB2_PORT0_ENABLED 0x00000001
112#define FSL_USB2_PORT1_ENABLED 0x00000002
113
114#define FLS_USB2_WORKAROUND_ENGCM09152 (1 << 0)
115
116struct spi_device;
117
118struct fsl_spi_platform_data {
119 u32 initial_spmode; /* initial SPMODE value */
120 s16 bus_num;
121 unsigned int flags;
122#define SPI_QE_CPU_MODE (1 << 0) /* QE CPU ("PIO") mode */
123#define SPI_CPM_MODE (1 << 1) /* CPM/QE ("DMA") mode */
124#define SPI_CPM1 (1 << 2) /* SPI unit is in CPM1 block */
125#define SPI_CPM2 (1 << 3) /* SPI unit is in CPM2 block */
126#define SPI_QE (1 << 4) /* SPI unit is in QE block */
127 /* board specific information */
128 u16 max_chipselect;
129 void (*cs_control)(struct spi_device *spi, bool on);
130 u32 sysclk;
131};
132
133struct mpc8xx_pcmcia_ops {
134 void(*hw_ctrl)(int slot, int enable);
135 int(*voltage_set)(int slot, int vcc, int vpp);
136};
137
138/* Returns non-zero if the current suspend operation would
139 * lead to a deep sleep (i.e. power removed from the core,
140 * instead of just the clock).
141 */
142#if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
143int fsl_deep_sleep(void);
144#else
145static inline int fsl_deep_sleep(void) { return 0; }
146#endif
147
148#endif /* _FSL_DEVICE_H_ */