tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1#ifndef __ASM_POWERPC_PCI_H
2#define __ASM_POWERPC_PCI_H
3#ifdef __KERNEL__
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/types.h>
13#include <linux/slab.h>
14#include <linux/string.h>
15#include <linux/dma-mapping.h>
16#include <linux/scatterlist.h>
17
18#include <asm/machdep.h>
19#include <asm/io.h>
20#include <asm/prom.h>
21#include <asm/pci-bridge.h>
22
23#include <asm-generic/pci-dma-compat.h>
24
25/* Return values for pci_controller_ops.probe_mode function */
26#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
27#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
28#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
29
30#define PCIBIOS_MIN_IO 0x1000
31#define PCIBIOS_MIN_MEM 0x10000000
32
33struct pci_dev;
34
35/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
36#define IOBASE_BRIDGE_NUMBER 0
37#define IOBASE_MEMORY 1
38#define IOBASE_IO 2
39#define IOBASE_ISA_IO 3
40#define IOBASE_ISA_MEM 4
41
42/*
43 * Set this to 1 if you want the kernel to re-assign all PCI
44 * bus numbers (don't do that on ppc64 yet !)
45 */
46#define pcibios_assign_all_busses() \
47 (pci_has_flag(PCI_REASSIGN_ALL_BUS))
48
49#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
50static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
51{
52 if (ppc_md.pci_get_legacy_ide_irq)
53 return ppc_md.pci_get_legacy_ide_irq(dev, channel);
54 return channel ? 15 : 14;
55}
56
57#ifdef CONFIG_PCI
58extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
59extern struct dma_map_ops *get_pci_dma_ops(void);
60#else /* CONFIG_PCI */
61#define set_pci_dma_ops(d)
62#define get_pci_dma_ops() NULL
63#endif
64
65#ifdef CONFIG_PPC64
66
67/*
68 * We want to avoid touching the cacheline size or MWI bit.
69 * pSeries firmware sets the cacheline size (which is not the cpu cacheline
70 * size in all cases) and hardware treats MWI the same as memory write.
71 */
72#define PCI_DISABLE_MWI
73
74#endif /* CONFIG_PPC64 */
75
76extern int pci_domain_nr(struct pci_bus *bus);
77
78/* Decide whether to display the domain number in /proc */
79extern int pci_proc_domain(struct pci_bus *bus);
80
81struct vm_area_struct;
82/* Map a range of PCI memory or I/O space for a device into user space */
83int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
84 enum pci_mmap_state mmap_state, int write_combine);
85
86/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
87#define HAVE_PCI_MMAP 1
88
89extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
90 size_t count);
91extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
92 size_t count);
93extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
94 struct vm_area_struct *vma,
95 enum pci_mmap_state mmap_state);
96
97#define HAVE_PCI_LEGACY 1
98
99#ifdef CONFIG_PPC64
100
101/* The PCI address space does not equal the physical memory address
102 * space (we have an IOMMU). The IDE and SCSI device layers use
103 * this boolean for bounce buffer decisions.
104 */
105#define PCI_DMA_BUS_IS_PHYS (0)
106
107#else /* 32-bit */
108
109/* The PCI address space does equal the physical memory
110 * address space (no IOMMU). The IDE and SCSI device layers use
111 * this boolean for bounce buffer decisions.
112 */
113#define PCI_DMA_BUS_IS_PHYS (1)
114
115#endif /* CONFIG_PPC64 */
116
117extern void pcibios_claim_one_bus(struct pci_bus *b);
118
119extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
120
121extern void pcibios_resource_survey(void);
122
123extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
124extern int remove_phb_dynamic(struct pci_controller *phb);
125
126extern struct pci_dev *of_create_pci_dev(struct device_node *node,
127 struct pci_bus *bus, int devfn);
128
129extern void of_scan_pci_bridge(struct pci_dev *dev);
130
131extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
132extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
133
134struct file;
135extern pgprot_t pci_phys_mem_access_prot(struct file *file,
136 unsigned long pfn,
137 unsigned long size,
138 pgprot_t prot);
139
140#define HAVE_ARCH_PCI_RESOURCE_TO_USER
141extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
142 const struct resource *rsrc,
143 resource_size_t *start, resource_size_t *end);
144
145extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
146extern void pcibios_setup_bus_devices(struct pci_bus *bus);
147extern void pcibios_setup_bus_self(struct pci_bus *bus);
148extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
149extern void pcibios_scan_phb(struct pci_controller *hose);
150
151#endif /* __KERNEL__ */
152#endif /* __ASM_POWERPC_PCI_H */