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1/*
2 * This file is part of the Chelsio T6 Crypto driver for Linux.
3 *
4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 *
34 */
35
36#ifndef __CHCR_CRYPTO_H__
37#define __CHCR_CRYPTO_H__
38
39#define GHASH_BLOCK_SIZE 16
40#define GHASH_DIGEST_SIZE 16
41
42#define CCM_B0_SIZE 16
43#define CCM_AAD_FIELD_SIZE 2
44#define T6_MAX_AAD_SIZE 511
45
46
47/* Define following if h/w is not dropping the AAD and IV data before
48 * giving the processed data
49 */
50
51#define CHCR_CRA_PRIORITY 500
52#define CHCR_AEAD_PRIORITY 6000
53#define CHCR_AES_MAX_KEY_LEN (2 * (AES_MAX_KEY_SIZE)) /* consider xts */
54#define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */
55
56#define CHCR_MAX_AUTHENC_AES_KEY_LEN 32 /* max aes key length*/
57#define CHCR_MAX_AUTHENC_SHA_KEY_LEN 128 /* max sha key length*/
58
59#define CHCR_GIVENCRYPT_OP 2
60/* CPL/SCMD parameters */
61
62#define CHCR_ENCRYPT_OP 0
63#define CHCR_DECRYPT_OP 1
64
65#define CHCR_SCMD_SEQ_NO_CTRL_32BIT 1
66#define CHCR_SCMD_SEQ_NO_CTRL_48BIT 2
67#define CHCR_SCMD_SEQ_NO_CTRL_64BIT 3
68
69#define CHCR_SCMD_PROTO_VERSION_GENERIC 4
70
71#define CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER 0
72#define CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH 1
73
74#define CHCR_SCMD_CIPHER_MODE_NOP 0
75#define CHCR_SCMD_CIPHER_MODE_AES_CBC 1
76#define CHCR_SCMD_CIPHER_MODE_AES_GCM 2
77#define CHCR_SCMD_CIPHER_MODE_AES_CTR 3
78#define CHCR_SCMD_CIPHER_MODE_GENERIC_AES 4
79#define CHCR_SCMD_CIPHER_MODE_AES_XTS 6
80#define CHCR_SCMD_CIPHER_MODE_AES_CCM 7
81
82#define CHCR_SCMD_AUTH_MODE_NOP 0
83#define CHCR_SCMD_AUTH_MODE_SHA1 1
84#define CHCR_SCMD_AUTH_MODE_SHA224 2
85#define CHCR_SCMD_AUTH_MODE_SHA256 3
86#define CHCR_SCMD_AUTH_MODE_GHASH 4
87#define CHCR_SCMD_AUTH_MODE_SHA512_224 5
88#define CHCR_SCMD_AUTH_MODE_SHA512_256 6
89#define CHCR_SCMD_AUTH_MODE_SHA512_384 7
90#define CHCR_SCMD_AUTH_MODE_SHA512_512 8
91#define CHCR_SCMD_AUTH_MODE_CBCMAC 9
92#define CHCR_SCMD_AUTH_MODE_CMAC 10
93
94#define CHCR_SCMD_HMAC_CTRL_NOP 0
95#define CHCR_SCMD_HMAC_CTRL_NO_TRUNC 1
96#define CHCR_SCMD_HMAC_CTRL_TRUNC_RFC4366 2
97#define CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT 3
98#define CHCR_SCMD_HMAC_CTRL_PL1 4
99#define CHCR_SCMD_HMAC_CTRL_PL2 5
100#define CHCR_SCMD_HMAC_CTRL_PL3 6
101#define CHCR_SCMD_HMAC_CTRL_DIV2 7
102#define VERIFY_HW 0
103#define VERIFY_SW 1
104
105#define CHCR_SCMD_IVGEN_CTRL_HW 0
106#define CHCR_SCMD_IVGEN_CTRL_SW 1
107/* This are not really mac key size. They are intermediate values
108 * of sha engine and its size
109 */
110#define CHCR_KEYCTX_MAC_KEY_SIZE_128 0
111#define CHCR_KEYCTX_MAC_KEY_SIZE_160 1
112#define CHCR_KEYCTX_MAC_KEY_SIZE_192 2
113#define CHCR_KEYCTX_MAC_KEY_SIZE_256 3
114#define CHCR_KEYCTX_MAC_KEY_SIZE_512 4
115#define CHCR_KEYCTX_CIPHER_KEY_SIZE_128 0
116#define CHCR_KEYCTX_CIPHER_KEY_SIZE_192 1
117#define CHCR_KEYCTX_CIPHER_KEY_SIZE_256 2
118#define CHCR_KEYCTX_NO_KEY 15
119
120#define CHCR_CPL_FW4_PLD_IV_OFFSET (5 * 64) /* bytes. flt #5 and #6 */
121#define CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET (7 * 64) /* bytes. flt #7 */
122#define CHCR_CPL_FW4_PLD_DATA_SIZE (4 * 64) /* bytes. flt #4 to #7 */
123
124#define KEY_CONTEXT_HDR_SALT_AND_PAD 16
125#define flits_to_bytes(x) (x * 8)
126
127#define IV_NOP 0
128#define IV_IMMEDIATE 1
129#define IV_DSGL 2
130
131#define AEAD_H_SIZE 16
132
133#define CRYPTO_ALG_SUB_TYPE_MASK 0x0f000000
134#define CRYPTO_ALG_SUB_TYPE_HASH_HMAC 0x01000000
135#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106 0x02000000
136#define CRYPTO_ALG_SUB_TYPE_AEAD_GCM 0x03000000
137#define CRYPTO_ALG_SUB_TYPE_CBC_SHA 0x04000000
138#define CRYPTO_ALG_SUB_TYPE_AEAD_CCM 0x05000000
139#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309 0x06000000
140#define CRYPTO_ALG_SUB_TYPE_CBC_NULL 0x07000000
141#define CRYPTO_ALG_SUB_TYPE_CTR 0x08000000
142#define CRYPTO_ALG_SUB_TYPE_CTR_RFC3686 0x09000000
143#define CRYPTO_ALG_SUB_TYPE_XTS 0x0a000000
144#define CRYPTO_ALG_SUB_TYPE_CBC 0x0b000000
145#define CRYPTO_ALG_SUB_TYPE_CTR_SHA 0x0c000000
146#define CRYPTO_ALG_SUB_TYPE_CTR_NULL 0x0d000000
147#define CRYPTO_ALG_TYPE_HMAC (CRYPTO_ALG_TYPE_AHASH |\
148 CRYPTO_ALG_SUB_TYPE_HASH_HMAC)
149
150#define MAX_SCRATCH_PAD_SIZE 32
151
152#define CHCR_HASH_MAX_BLOCK_SIZE_64 64
153#define CHCR_HASH_MAX_BLOCK_SIZE_128 128
154#define CHCR_SRC_SG_SIZE (0x10000 - sizeof(int))
155#define CHCR_DST_SG_SIZE 2048
156
157static inline struct chcr_context *a_ctx(struct crypto_aead *tfm)
158{
159 return crypto_aead_ctx(tfm);
160}
161
162static inline struct chcr_context *c_ctx(struct crypto_ablkcipher *tfm)
163{
164 return crypto_ablkcipher_ctx(tfm);
165}
166
167static inline struct chcr_context *h_ctx(struct crypto_ahash *tfm)
168{
169 return crypto_tfm_ctx(crypto_ahash_tfm(tfm));
170}
171
172struct ablk_ctx {
173 struct crypto_skcipher *sw_cipher;
174 struct crypto_cipher *aes_generic;
175 __be32 key_ctx_hdr;
176 unsigned int enckey_len;
177 unsigned char ciph_mode;
178 u8 key[CHCR_AES_MAX_KEY_LEN];
179 u8 nonce[4];
180 u8 rrkey[AES_MAX_KEY_SIZE];
181};
182struct chcr_aead_reqctx {
183 struct sk_buff *skb;
184 dma_addr_t iv_dma;
185 dma_addr_t b0_dma;
186 unsigned int b0_len;
187 unsigned int op;
188 short int aad_nents;
189 short int src_nents;
190 short int dst_nents;
191 u16 imm;
192 u16 verify;
193 u8 iv[CHCR_MAX_CRYPTO_IV_LEN + MAX_SCRATCH_PAD_SIZE];
194 u8 *scratch_pad;
195};
196
197struct ulptx_walk {
198 struct ulptx_sgl *sgl;
199 unsigned int nents;
200 unsigned int pair_idx;
201 unsigned int last_sg_len;
202 struct scatterlist *last_sg;
203 struct ulptx_sge_pair *pair;
204
205};
206
207struct dsgl_walk {
208 unsigned int nents;
209 unsigned int last_sg_len;
210 struct scatterlist *last_sg;
211 struct cpl_rx_phys_dsgl *dsgl;
212 struct phys_sge_pairs *to;
213};
214
215struct chcr_gcm_ctx {
216 u8 ghash_h[AEAD_H_SIZE];
217};
218
219struct chcr_authenc_ctx {
220 u8 dec_rrkey[AES_MAX_KEY_SIZE];
221 u8 h_iopad[2 * CHCR_HASH_MAX_DIGEST_SIZE];
222 unsigned char auth_mode;
223};
224
225struct __aead_ctx {
226 struct chcr_gcm_ctx gcm[0];
227 struct chcr_authenc_ctx authenc[0];
228};
229
230struct chcr_aead_ctx {
231 __be32 key_ctx_hdr;
232 unsigned int enckey_len;
233 struct crypto_aead *sw_cipher;
234 u8 salt[MAX_SALT];
235 u8 key[CHCR_AES_MAX_KEY_LEN];
236 u8 nonce[4];
237 u16 hmac_ctrl;
238 u16 mayverify;
239 struct __aead_ctx ctx[0];
240};
241
242struct hmac_ctx {
243 struct crypto_shash *base_hash;
244 u8 ipad[CHCR_HASH_MAX_BLOCK_SIZE_128];
245 u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128];
246};
247
248struct __crypto_ctx {
249 struct hmac_ctx hmacctx[0];
250 struct ablk_ctx ablkctx[0];
251 struct chcr_aead_ctx aeadctx[0];
252};
253
254struct chcr_context {
255 struct chcr_dev *dev;
256 unsigned char tx_qidx;
257 unsigned char rx_qidx;
258 unsigned char tx_chan_id;
259 unsigned char pci_chan_id;
260 struct __crypto_ctx crypto_ctx[0];
261};
262
263struct chcr_hctx_per_wr {
264 struct scatterlist *srcsg;
265 struct sk_buff *skb;
266 dma_addr_t dma_addr;
267 u32 dma_len;
268 unsigned int src_ofst;
269 unsigned int processed;
270 u32 result;
271 u8 is_sg_map;
272 u8 imm;
273 /*Final callback called. Driver cannot rely on nbytes to decide
274 * final call
275 */
276 u8 isfinal;
277};
278
279struct chcr_ahash_req_ctx {
280 struct chcr_hctx_per_wr hctx_wr;
281 u8 *reqbfr;
282 u8 *skbfr;
283 /* SKB which is being sent to the hardware for processing */
284 u64 data_len; /* Data len till time */
285 u8 reqlen;
286 u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE];
287 u8 bfr1[CHCR_HASH_MAX_BLOCK_SIZE_128];
288 u8 bfr2[CHCR_HASH_MAX_BLOCK_SIZE_128];
289};
290
291struct chcr_blkcipher_req_ctx {
292 struct sk_buff *skb;
293 struct scatterlist *dstsg;
294 unsigned int processed;
295 unsigned int last_req_len;
296 struct scatterlist *srcsg;
297 unsigned int src_ofst;
298 unsigned int dst_ofst;
299 unsigned int op;
300 u16 imm;
301 u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
302};
303
304struct chcr_alg_template {
305 u32 type;
306 u32 is_registered;
307 union {
308 struct crypto_alg crypto;
309 struct ahash_alg hash;
310 struct aead_alg aead;
311 } alg;
312};
313
314typedef struct sk_buff *(*create_wr_t)(struct aead_request *req,
315 unsigned short qid,
316 int size);
317
318void chcr_verify_tag(struct aead_request *req, u8 *input, int *err);
319int chcr_aead_dma_map(struct device *dev, struct aead_request *req,
320 unsigned short op_type);
321void chcr_aead_dma_unmap(struct device *dev, struct aead_request *req,
322 unsigned short op_type);
323void chcr_add_aead_dst_ent(struct aead_request *req,
324 struct cpl_rx_phys_dsgl *phys_cpl,
325 unsigned int assoclen,
326 unsigned short qid);
327void chcr_add_aead_src_ent(struct aead_request *req, struct ulptx_sgl *ulptx,
328 unsigned int assoclen);
329void chcr_add_cipher_src_ent(struct ablkcipher_request *req,
330 void *ulptx,
331 struct cipher_wr_param *wrparam);
332int chcr_cipher_dma_map(struct device *dev, struct ablkcipher_request *req);
333void chcr_cipher_dma_unmap(struct device *dev, struct ablkcipher_request *req);
334void chcr_add_cipher_dst_ent(struct ablkcipher_request *req,
335 struct cpl_rx_phys_dsgl *phys_cpl,
336 struct cipher_wr_param *wrparam,
337 unsigned short qid);
338int sg_nents_len_skip(struct scatterlist *sg, u64 len, u64 skip);
339void chcr_add_hash_src_ent(struct ahash_request *req, struct ulptx_sgl *ulptx,
340 struct hash_wr_param *param);
341int chcr_hash_dma_map(struct device *dev, struct ahash_request *req);
342void chcr_hash_dma_unmap(struct device *dev, struct ahash_request *req);
343void chcr_aead_common_exit(struct aead_request *req);
344#endif /* __CHCR_CRYPTO_H__ */