tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef _DT_BINDINGS_CLK_MSM_GCC_COBALT_H
15#define _DT_BINDINGS_CLK_MSM_GCC_COBALT_H
16
17#define BLSP1_QUP1_I2C_APPS_CLK_SRC 0
18#define BLSP1_QUP1_SPI_APPS_CLK_SRC 1
19#define BLSP1_QUP2_I2C_APPS_CLK_SRC 2
20#define BLSP1_QUP2_SPI_APPS_CLK_SRC 3
21#define BLSP1_QUP3_I2C_APPS_CLK_SRC 4
22#define BLSP1_QUP3_SPI_APPS_CLK_SRC 5
23#define BLSP1_QUP4_I2C_APPS_CLK_SRC 6
24#define BLSP1_QUP4_SPI_APPS_CLK_SRC 7
25#define BLSP1_QUP5_I2C_APPS_CLK_SRC 8
26#define BLSP1_QUP5_SPI_APPS_CLK_SRC 9
27#define BLSP1_QUP6_I2C_APPS_CLK_SRC 10
28#define BLSP1_QUP6_SPI_APPS_CLK_SRC 11
29#define BLSP1_UART1_APPS_CLK_SRC 12
30#define BLSP1_UART2_APPS_CLK_SRC 13
31#define BLSP1_UART3_APPS_CLK_SRC 14
32#define BLSP2_QUP1_I2C_APPS_CLK_SRC 15
33#define BLSP2_QUP1_SPI_APPS_CLK_SRC 16
34#define BLSP2_QUP2_I2C_APPS_CLK_SRC 17
35#define BLSP2_QUP2_SPI_APPS_CLK_SRC 18
36#define BLSP2_QUP3_I2C_APPS_CLK_SRC 19
37#define BLSP2_QUP3_SPI_APPS_CLK_SRC 20
38#define BLSP2_QUP4_I2C_APPS_CLK_SRC 21
39#define BLSP2_QUP4_SPI_APPS_CLK_SRC 22
40#define BLSP2_QUP5_I2C_APPS_CLK_SRC 23
41#define BLSP2_QUP5_SPI_APPS_CLK_SRC 24
42#define BLSP2_QUP6_I2C_APPS_CLK_SRC 25
43#define BLSP2_QUP6_SPI_APPS_CLK_SRC 26
44#define BLSP2_UART1_APPS_CLK_SRC 27
45#define BLSP2_UART2_APPS_CLK_SRC 28
46#define BLSP2_UART3_APPS_CLK_SRC 29
47#define GCC_AGGRE1_NOC_XO_CLK 30
48#define GCC_AGGRE1_UFS_AXI_CLK 31
49#define GCC_AGGRE1_USB3_AXI_CLK 32
50#define GCC_APSS_QDSS_TSCTR_DIV2_CLK 33
51#define GCC_APSS_QDSS_TSCTR_DIV8_CLK 34
52#define GCC_BIMC_HMSS_AXI_CLK 35
53#define GCC_BIMC_MSS_Q6_AXI_CLK 36
54#define GCC_BLSP1_AHB_CLK 37
55#define GCC_BLSP1_QUP1_I2C_APPS_CLK 38
56#define GCC_BLSP1_QUP1_SPI_APPS_CLK 39
57#define GCC_BLSP1_QUP2_I2C_APPS_CLK 40
58#define GCC_BLSP1_QUP2_SPI_APPS_CLK 41
59#define GCC_BLSP1_QUP3_I2C_APPS_CLK 42
60#define GCC_BLSP1_QUP3_SPI_APPS_CLK 43
61#define GCC_BLSP1_QUP4_I2C_APPS_CLK 44
62#define GCC_BLSP1_QUP4_SPI_APPS_CLK 45
63#define GCC_BLSP1_QUP5_I2C_APPS_CLK 46
64#define GCC_BLSP1_QUP5_SPI_APPS_CLK 47
65#define GCC_BLSP1_QUP6_I2C_APPS_CLK 48
66#define GCC_BLSP1_QUP6_SPI_APPS_CLK 49
67#define GCC_BLSP1_SLEEP_CLK 50
68#define GCC_BLSP1_UART1_APPS_CLK 51
69#define GCC_BLSP1_UART2_APPS_CLK 52
70#define GCC_BLSP1_UART3_APPS_CLK 53
71#define GCC_BLSP2_AHB_CLK 54
72#define GCC_BLSP2_QUP1_I2C_APPS_CLK 55
73#define GCC_BLSP2_QUP1_SPI_APPS_CLK 56
74#define GCC_BLSP2_QUP2_I2C_APPS_CLK 57
75#define GCC_BLSP2_QUP2_SPI_APPS_CLK 58
76#define GCC_BLSP2_QUP3_I2C_APPS_CLK 59
77#define GCC_BLSP2_QUP3_SPI_APPS_CLK 60
78#define GCC_BLSP2_QUP4_I2C_APPS_CLK 61
79#define GCC_BLSP2_QUP4_SPI_APPS_CLK 62
80#define GCC_BLSP2_QUP5_I2C_APPS_CLK 63
81#define GCC_BLSP2_QUP5_SPI_APPS_CLK 64
82#define GCC_BLSP2_QUP6_I2C_APPS_CLK 65
83#define GCC_BLSP2_QUP6_SPI_APPS_CLK 66
84#define GCC_BLSP2_SLEEP_CLK 67
85#define GCC_BLSP2_UART1_APPS_CLK 68
86#define GCC_BLSP2_UART2_APPS_CLK 69
87#define GCC_BLSP2_UART3_APPS_CLK 70
88#define GCC_CFG_NOC_USB3_AXI_CLK 71
89#define GCC_GP1_CLK 72
90#define GCC_GP2_CLK 73
91#define GCC_GP3_CLK 74
92#define GCC_GPU_BIMC_GFX_CLK 75
93#define GCC_GPU_BIMC_GFX_SRC_CLK 76
94#define GCC_GPU_CFG_AHB_CLK 77
95#define GCC_GPU_SNOC_DVM_GFX_CLK 78
96#define GCC_HMSS_AHB_CLK 79
97#define GCC_HMSS_AT_CLK 80
98#define GCC_HMSS_DVM_BUS_CLK 81
99#define GCC_HMSS_RBCPR_CLK 82
100#define GCC_HMSS_TRIG_CLK 83
101#define GCC_LPASS_AT_CLK 84
102#define GCC_LPASS_TRIG_CLK 85
103#define GCC_MMSS_NOC_CFG_AHB_CLK 86
104#define GCC_MMSS_QM_AHB_CLK 87
105#define GCC_MMSS_QM_CORE_CLK 88
106#define GCC_MMSS_SYS_NOC_AXI_CLK 89
107#define GCC_MSS_AT_CLK 90
108#define GCC_PCIE_0_AUX_CLK 91
109#define GCC_PCIE_0_CFG_AHB_CLK 92
110#define GCC_PCIE_0_MSTR_AXI_CLK 93
111#define GCC_PCIE_0_PIPE_CLK 94
112#define GCC_PCIE_0_SLV_AXI_CLK 95
113#define GCC_PCIE_PHY_AUX_CLK 96
114#define GCC_PDM2_CLK 97
115#define GCC_PDM_AHB_CLK 98
116#define GCC_PDM_XO4_CLK 99
117#define GCC_PRNG_AHB_CLK 100
118#define GCC_SDCC2_AHB_CLK 101
119#define GCC_SDCC2_APPS_CLK 102
120#define GCC_SDCC4_AHB_CLK 103
121#define GCC_SDCC4_APPS_CLK 104
122#define GCC_TSIF_AHB_CLK 105
123#define GCC_TSIF_INACTIVITY_TIMERS_CLK 106
124#define GCC_TSIF_REF_CLK 107
125#define GCC_UFS_AHB_CLK 108
126#define GCC_UFS_AXI_CLK 109
127#define GCC_UFS_ICE_CORE_CLK 110
128#define GCC_UFS_PHY_AUX_CLK 111
129#define GCC_UFS_RX_SYMBOL_0_CLK 112
130#define GCC_UFS_RX_SYMBOL_1_CLK 113
131#define GCC_UFS_TX_SYMBOL_0_CLK 114
132#define GCC_UFS_UNIPRO_CORE_CLK 115
133#define GCC_USB30_MASTER_CLK 116
134#define GCC_USB30_MOCK_UTMI_CLK 117
135#define GCC_USB30_SLEEP_CLK 118
136#define GCC_USB3_PHY_AUX_CLK 119
137#define GCC_USB3_PHY_PIPE_CLK 120
138#define GCC_USB_PHY_CFG_AHB2PHY_CLK 121
139#define GP1_CLK_SRC 122
140#define GP2_CLK_SRC 123
141#define GP3_CLK_SRC 124
142#define GPLL0 125
143#define GPLL0_OUT_EVEN 126
144#define GPLL0_OUT_MAIN 127
145#define GPLL0_OUT_ODD 128
146#define GPLL0_OUT_TEST 129
147#define GPLL1 130
148#define GPLL1_OUT_EVEN 131
149#define GPLL1_OUT_MAIN 132
150#define GPLL1_OUT_ODD 133
151#define GPLL1_OUT_TEST 134
152#define GPLL2 135
153#define GPLL2_OUT_EVEN 136
154#define GPLL2_OUT_MAIN 137
155#define GPLL2_OUT_ODD 138
156#define GPLL2_OUT_TEST 139
157#define GPLL3 140
158#define GPLL3_OUT_EVEN 141
159#define GPLL3_OUT_MAIN 142
160#define GPLL3_OUT_ODD 143
161#define GPLL3_OUT_TEST 144
162#define GPLL4 145
163#define GPLL4_OUT_EVEN 146
164#define GPLL4_OUT_MAIN 147
165#define GPLL4_OUT_ODD 148
166#define GPLL4_OUT_TEST 149
167#define GPLL6 150
168#define GPLL6_OUT_EVEN 151
169#define GPLL6_OUT_MAIN 152
170#define GPLL6_OUT_ODD 153
171#define GPLL6_OUT_TEST 154
172#define HMSS_AHB_CLK_SRC 155
173#define HMSS_RBCPR_CLK_SRC 156
174#define PCIE_AUX_CLK_SRC 157
175#define PDM2_CLK_SRC 158
176#define SDCC2_APPS_CLK_SRC 159
177#define SDCC4_APPS_CLK_SRC 160
178#define TSIF_REF_CLK_SRC 161
179#define UFS_AXI_CLK_SRC 162
180#define USB30_MASTER_CLK_SRC 163
181#define USB30_MOCK_UTMI_CLK_SRC 164
182#define USB3_PHY_AUX_CLK_SRC 165
183
184#define PCIE_0_GDSC 0
185#define UFS_GDSC 1
186#define USB_30_GDSC 2
187
188#define GCC_BLSP1_QUP1_BCR 0
189#define GCC_BLSP1_QUP2_BCR 1
190#define GCC_BLSP1_QUP3_BCR 2
191#define GCC_BLSP1_QUP4_BCR 3
192#define GCC_BLSP1_QUP5_BCR 4
193#define GCC_BLSP1_QUP6_BCR 5
194#define GCC_BLSP2_QUP1_BCR 6
195#define GCC_BLSP2_QUP2_BCR 7
196#define GCC_BLSP2_QUP3_BCR 8
197#define GCC_BLSP2_QUP4_BCR 9
198#define GCC_BLSP2_QUP5_BCR 10
199#define GCC_BLSP2_QUP6_BCR 11
200#define GCC_PCIE_0_BCR 12
201#define GCC_PDM_BCR 13
202#define GCC_SDCC2_BCR 14
203#define GCC_SDCC4_BCR 15
204#define GCC_TSIF_BCR 16
205#define GCC_UFS_BCR 17
206#define GCC_USB_30_BCR 18
207
208#endif