tjh.dev
Linux kernel mirror (for testing)
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linux
1/*
2 * Driver for the MMC / SD / SDIO cell found in:
3 *
4 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
5 *
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
8 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
9 * Copyright (C) 2007 Ian Molton
10 * Copyright (C) 2004 Ian Molton
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#ifndef TMIO_MMC_H
19#define TMIO_MMC_H
20
21#include <linux/dmaengine.h>
22#include <linux/highmem.h>
23#include <linux/mutex.h>
24#include <linux/pagemap.h>
25#include <linux/scatterlist.h>
26#include <linux/spinlock.h>
27#include <linux/interrupt.h>
28
29#define CTL_SD_CMD 0x00
30#define CTL_ARG_REG 0x04
31#define CTL_STOP_INTERNAL_ACTION 0x08
32#define CTL_XFER_BLK_COUNT 0xa
33#define CTL_RESPONSE 0x0c
34/* driver merges STATUS and following STATUS2 */
35#define CTL_STATUS 0x1c
36/* driver merges IRQ_MASK and following IRQ_MASK2 */
37#define CTL_IRQ_MASK 0x20
38#define CTL_SD_CARD_CLK_CTL 0x24
39#define CTL_SD_XFER_LEN 0x26
40#define CTL_SD_MEM_CARD_OPT 0x28
41#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
42#define CTL_SD_DATA_PORT 0x30
43#define CTL_TRANSACTION_CTL 0x34
44#define CTL_SDIO_STATUS 0x36
45#define CTL_SDIO_IRQ_MASK 0x38
46#define CTL_DMA_ENABLE 0xd8
47#define CTL_RESET_SD 0xe0
48#define CTL_VERSION 0xe2
49#define CTL_SDIF_MODE 0xe6
50#define CTL_SDIO_REGS 0x100
51#define CTL_CLK_AND_WAIT_CTL 0x138
52#define CTL_RESET_SDIO 0x1e0
53
54/* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
55#define TMIO_STOP_STP BIT(0)
56#define TMIO_STOP_SEC BIT(8)
57
58/* Definitions for values the CTL_STATUS register can take */
59#define TMIO_STAT_CMDRESPEND BIT(0)
60#define TMIO_STAT_DATAEND BIT(2)
61#define TMIO_STAT_CARD_REMOVE BIT(3)
62#define TMIO_STAT_CARD_INSERT BIT(4)
63#define TMIO_STAT_SIGSTATE BIT(5)
64#define TMIO_STAT_WRPROTECT BIT(7)
65#define TMIO_STAT_CARD_REMOVE_A BIT(8)
66#define TMIO_STAT_CARD_INSERT_A BIT(9)
67#define TMIO_STAT_SIGSTATE_A BIT(10)
68
69/* These belong technically to CTL_STATUS2, but the driver merges them */
70#define TMIO_STAT_CMD_IDX_ERR BIT(16)
71#define TMIO_STAT_CRCFAIL BIT(17)
72#define TMIO_STAT_STOPBIT_ERR BIT(18)
73#define TMIO_STAT_DATATIMEOUT BIT(19)
74#define TMIO_STAT_RXOVERFLOW BIT(20)
75#define TMIO_STAT_TXUNDERRUN BIT(21)
76#define TMIO_STAT_CMDTIMEOUT BIT(22)
77#define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */
78#define TMIO_STAT_RXRDY BIT(24)
79#define TMIO_STAT_TXRQ BIT(25)
80#define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
81#define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
82#define TMIO_STAT_CMD_BUSY BIT(30)
83#define TMIO_STAT_ILL_ACCESS BIT(31)
84
85/* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */
86#define CLK_CTL_DIV_MASK 0xff
87#define CLK_CTL_SCLKEN BIT(8)
88
89/* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
90#define CARD_OPT_WIDTH8 BIT(13)
91#define CARD_OPT_WIDTH BIT(15)
92
93/* Definitions for values the CTL_SDIO_STATUS register can take */
94#define TMIO_SDIO_STAT_IOIRQ 0x0001
95#define TMIO_SDIO_STAT_EXPUB52 0x4000
96#define TMIO_SDIO_STAT_EXWT 0x8000
97#define TMIO_SDIO_MASK_ALL 0xc007
98
99#define TMIO_SDIO_SETBITS_MASK 0x0006
100
101/* Definitions for values the CTL_DMA_ENABLE register can take */
102#define DMA_ENABLE_DMASDRW BIT(1)
103
104/* Define some IRQ masks */
105/* This is the mask used at reset by the chip */
106#define TMIO_MASK_ALL 0x837f031d
107#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
108#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
109#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
110 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
111#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
112
113struct tmio_mmc_data;
114struct tmio_mmc_host;
115
116struct tmio_mmc_dma_ops {
117 void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
118 void (*enable)(struct tmio_mmc_host *host, bool enable);
119 void (*request)(struct tmio_mmc_host *host,
120 struct tmio_mmc_data *pdata);
121 void (*release)(struct tmio_mmc_host *host);
122 void (*abort)(struct tmio_mmc_host *host);
123 void (*dataend)(struct tmio_mmc_host *host);
124};
125
126struct tmio_mmc_host {
127 void __iomem *ctl;
128 struct mmc_command *cmd;
129 struct mmc_request *mrq;
130 struct mmc_data *data;
131 struct mmc_host *mmc;
132 struct mmc_host_ops ops;
133
134 /* Callbacks for clock / power control */
135 void (*set_pwr)(struct platform_device *host, int state);
136 void (*set_clk_div)(struct platform_device *host, int state);
137
138 /* pio related stuff */
139 struct scatterlist *sg_ptr;
140 struct scatterlist *sg_orig;
141 unsigned int sg_len;
142 unsigned int sg_off;
143 unsigned int bus_shift;
144
145 struct platform_device *pdev;
146 struct tmio_mmc_data *pdata;
147
148 /* DMA support */
149 bool force_pio;
150 struct dma_chan *chan_rx;
151 struct dma_chan *chan_tx;
152 struct tasklet_struct dma_issue;
153 struct scatterlist bounce_sg;
154 u8 *bounce_buf;
155
156 /* Track lost interrupts */
157 struct delayed_work delayed_reset_work;
158 struct work_struct done;
159
160 /* Cache */
161 u32 sdcard_irq_mask;
162 u32 sdio_irq_mask;
163 unsigned int clk_cache;
164
165 spinlock_t lock; /* protect host private data */
166 unsigned long last_req_ts;
167 struct mutex ios_lock; /* protect set_ios() context */
168 bool native_hotplug;
169 bool sdio_irq_enabled;
170
171 /* Mandatory callback */
172 int (*clk_enable)(struct tmio_mmc_host *host);
173
174 /* Optional callbacks */
175 unsigned int (*clk_update)(struct tmio_mmc_host *host,
176 unsigned int new_clock);
177 void (*clk_disable)(struct tmio_mmc_host *host);
178 int (*multi_io_quirk)(struct mmc_card *card,
179 unsigned int direction, int blk_size);
180 int (*write16_hook)(struct tmio_mmc_host *host, int addr);
181 void (*hw_reset)(struct tmio_mmc_host *host);
182 void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
183 bool (*check_scc_error)(struct tmio_mmc_host *host);
184
185 /*
186 * Mandatory callback for tuning to occur which is optional for SDR50
187 * and mandatory for SDR104.
188 */
189 unsigned int (*init_tuning)(struct tmio_mmc_host *host);
190 int (*select_tuning)(struct tmio_mmc_host *host);
191
192 /* Tuning values: 1 for success, 0 for failure */
193 DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
194 unsigned int tap_num;
195 unsigned long tap_set;
196
197 void (*prepare_hs400_tuning)(struct tmio_mmc_host *host);
198 void (*hs400_downgrade)(struct tmio_mmc_host *host);
199 void (*hs400_complete)(struct tmio_mmc_host *host);
200
201 const struct tmio_mmc_dma_ops *dma_ops;
202};
203
204struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
205 struct tmio_mmc_data *pdata);
206void tmio_mmc_host_free(struct tmio_mmc_host *host);
207int tmio_mmc_host_probe(struct tmio_mmc_host *host);
208void tmio_mmc_host_remove(struct tmio_mmc_host *host);
209void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
210
211void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
212void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
213irqreturn_t tmio_mmc_irq(int irq, void *devid);
214
215static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
216 unsigned long *flags)
217{
218 local_irq_save(*flags);
219 return kmap_atomic(sg_page(sg)) + sg->offset;
220}
221
222static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
223 unsigned long *flags, void *virt)
224{
225 kunmap_atomic(virt - sg->offset);
226 local_irq_restore(*flags);
227}
228
229#ifdef CONFIG_PM
230int tmio_mmc_host_runtime_suspend(struct device *dev);
231int tmio_mmc_host_runtime_resume(struct device *dev);
232#endif
233
234static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
235{
236 return ioread16(host->ctl + (addr << host->bus_shift));
237}
238
239static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
240 u16 *buf, int count)
241{
242 ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count);
243}
244
245static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
246 int addr)
247{
248 return ioread16(host->ctl + (addr << host->bus_shift)) |
249 ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
250}
251
252static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
253 u32 *buf, int count)
254{
255 ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count);
256}
257
258static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
259 u16 val)
260{
261 /* If there is a hook and it returns non-zero then there
262 * is an error and the write should be skipped
263 */
264 if (host->write16_hook && host->write16_hook(host, addr))
265 return;
266 iowrite16(val, host->ctl + (addr << host->bus_shift));
267}
268
269static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
270 u16 *buf, int count)
271{
272 iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count);
273}
274
275static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
276 int addr, u32 val)
277{
278 iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
279 iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
280}
281
282static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
283 const u32 *buf, int count)
284{
285 iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count);
286}
287
288#endif