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1/*
2 * OMAP GPMC (General Purpose Memory Controller) defines
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#include <linux/platform_data/gpmc-omap.h>
11
12#define GPMC_CONFIG_WP 0x00000005
13
14/* IRQ numbers in GPMC IRQ domain for legacy boot use */
15#define GPMC_IRQ_FIFOEVENTENABLE 0
16#define GPMC_IRQ_COUNT_EVENT 1
17
18/**
19 * gpmc_nand_ops - Interface between NAND and GPMC
20 * @nand_write_buffer_empty: get the NAND write buffer empty status.
21 */
22struct gpmc_nand_ops {
23 bool (*nand_writebuffer_empty)(void);
24};
25
26struct gpmc_nand_regs;
27
28struct gpmc_onenand_info {
29 bool sync_read;
30 bool sync_write;
31 int burst_len;
32};
33
34#if IS_ENABLED(CONFIG_OMAP_GPMC)
35struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
36 int cs);
37/**
38 * gpmc_omap_onenand_set_timings - set optimized sync timings.
39 * @cs: Chip Select Region
40 * @freq: Chip frequency
41 * @latency: Burst latency cycle count
42 * @info: Structure describing parameters used
43 *
44 * Sets optimized timings for the @cs region based on @freq and @latency.
45 * Updates the @info structure based on the GPMC settings.
46 */
47int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq,
48 int latency,
49 struct gpmc_onenand_info *info);
50
51#else
52static inline struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
53 int cs)
54{
55 return NULL;
56}
57
58static inline
59int gpmc_omap_onenand_set_timings(struct device *dev, int cs, int freq,
60 int latency,
61 struct gpmc_onenand_info *info)
62{
63 return -EINVAL;
64}
65#endif /* CONFIG_OMAP_GPMC */
66
67extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
68 struct gpmc_settings *gpmc_s,
69 struct gpmc_device_timings *dev_t);
70
71struct device_node;
72
73extern int gpmc_get_client_irq(unsigned irq_config);
74
75extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
76
77extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
78extern int gpmc_calc_divider(unsigned int sync_clk);
79extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t,
80 const struct gpmc_settings *s);
81extern int gpmc_cs_program_settings(int cs, struct gpmc_settings *p);
82extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
83extern void gpmc_cs_free(int cs);
84extern int gpmc_configure(int cmd, int wval);
85extern void gpmc_read_settings_dt(struct device_node *np,
86 struct gpmc_settings *p);
87
88extern void omap3_gpmc_save_context(void);
89extern void omap3_gpmc_restore_context(void);
90
91struct gpmc_timings;
92struct omap_nand_platform_data;
93struct omap_onenand_platform_data;
94
95#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2)
96extern int gpmc_onenand_init(struct omap_onenand_platform_data *d);
97#else
98#define board_onenand_data NULL
99static inline int gpmc_onenand_init(struct omap_onenand_platform_data *d)
100{
101 return 0;
102}
103#endif