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1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2004 IBM 4 * 5 * Implements the generic device dma API for powerpc. 6 * the pci and vio busses 7 */ 8#ifndef _ASM_DMA_MAPPING_H 9#define _ASM_DMA_MAPPING_H 10#ifdef __KERNEL__ 11 12#include <linux/types.h> 13#include <linux/cache.h> 14/* need struct page definitions */ 15#include <linux/mm.h> 16#include <linux/scatterlist.h> 17#include <linux/dma-debug.h> 18#include <asm/io.h> 19#include <asm/swiotlb.h> 20 21/* Some dma direct funcs must be visible for use in other dma_ops */ 22extern void *__dma_nommu_alloc_coherent(struct device *dev, size_t size, 23 dma_addr_t *dma_handle, gfp_t flag, 24 unsigned long attrs); 25extern void __dma_nommu_free_coherent(struct device *dev, size_t size, 26 void *vaddr, dma_addr_t dma_handle, 27 unsigned long attrs); 28extern int dma_nommu_mmap_coherent(struct device *dev, 29 struct vm_area_struct *vma, 30 void *cpu_addr, dma_addr_t handle, 31 size_t size, unsigned long attrs); 32 33#ifdef CONFIG_NOT_COHERENT_CACHE 34/* 35 * DMA-consistent mapping functions for PowerPCs that don't support 36 * cache snooping. These allocate/free a region of uncached mapped 37 * memory space for use with DMA devices. Alternatively, you could 38 * allocate the space "normally" and use the cache management functions 39 * to ensure it is consistent. 40 */ 41struct device; 42extern void *__dma_alloc_coherent(struct device *dev, size_t size, 43 dma_addr_t *handle, gfp_t gfp); 44extern void __dma_free_coherent(size_t size, void *vaddr); 45extern void __dma_sync(void *vaddr, size_t size, int direction); 46extern void __dma_sync_page(struct page *page, unsigned long offset, 47 size_t size, int direction); 48extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr); 49 50#else /* ! CONFIG_NOT_COHERENT_CACHE */ 51/* 52 * Cache coherent cores. 53 */ 54 55#define __dma_alloc_coherent(dev, gfp, size, handle) NULL 56#define __dma_free_coherent(size, addr) ((void)0) 57#define __dma_sync(addr, size, rw) ((void)0) 58#define __dma_sync_page(pg, off, sz, rw) ((void)0) 59 60#endif /* ! CONFIG_NOT_COHERENT_CACHE */ 61 62static inline unsigned long device_to_mask(struct device *dev) 63{ 64 if (dev->dma_mask && *dev->dma_mask) 65 return *dev->dma_mask; 66 /* Assume devices without mask can take 32 bit addresses */ 67 return 0xfffffffful; 68} 69 70/* 71 * Available generic sets of operations 72 */ 73#ifdef CONFIG_PPC64 74extern struct dma_map_ops dma_iommu_ops; 75#endif 76extern const struct dma_map_ops dma_nommu_ops; 77 78static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) 79{ 80 /* We don't handle the NULL dev case for ISA for now. We could 81 * do it via an out of line call but it is not needed for now. The 82 * only ISA DMA device we support is the floppy and we have a hack 83 * in the floppy driver directly to get a device for us. 84 */ 85 return NULL; 86} 87 88/* 89 * get_dma_offset() 90 * 91 * Get the dma offset on configurations where the dma address can be determined 92 * from the physical address by looking at a simple offset. Direct dma and 93 * swiotlb use this function, but it is typically not used by implementations 94 * with an iommu. 95 */ 96static inline dma_addr_t get_dma_offset(struct device *dev) 97{ 98 if (dev) 99 return dev->archdata.dma_offset; 100 101 return PCI_DRAM_OFFSET; 102} 103 104static inline void set_dma_offset(struct device *dev, dma_addr_t off) 105{ 106 if (dev) 107 dev->archdata.dma_offset = off; 108} 109 110#define HAVE_ARCH_DMA_SET_MASK 1 111extern int dma_set_mask(struct device *dev, u64 dma_mask); 112 113extern u64 __dma_get_required_mask(struct device *dev); 114 115#define ARCH_HAS_DMA_MMAP_COHERENT 116 117#endif /* __KERNEL__ */ 118#endif /* _ASM_DMA_MAPPING_H */