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1Generic on-chip SRAM 2 3Simple IO memory regions to be managed by the genalloc API. 4 5Required properties: 6 7- compatible : mmio-sram or atmel,sama5d2-securam 8 9- reg : SRAM iomem address range 10 11Reserving sram areas: 12--------------------- 13 14Each child of the sram node specifies a region of reserved memory. Each 15child node should use a 'reg' property to specify a specific range of 16reserved memory. 17 18Following the generic-names recommended practice, node names should 19reflect the purpose of the node. Unit address (@<address>) should be 20appended to the name. 21 22Required properties in the sram node: 23 24- #address-cells, #size-cells : should use the same values as the root node 25- ranges : standard definition, should translate from local addresses 26 within the sram to bus addresses 27 28Optional properties in the sram node: 29 30- no-memory-wc : the flag indicating, that SRAM memory region has not to 31 be remapped as write combining. WC is used by default. 32 33Required properties in the area nodes: 34 35- reg : iomem address range, relative to the SRAM range 36 37Optional properties in the area nodes: 38 39- compatible : standard definition, should contain a vendor specific string 40 in the form <vendor>,[<device>-]<usage> 41- pool : indicates that the particular reserved SRAM area is addressable 42 and in use by another device or devices 43- export : indicates that the reserved SRAM area may be accessed outside 44 of the kernel, e.g. by bootloader or userspace 45- protect-exec : Same as 'pool' above but with the additional 46 constraint that code wil be run from the region and 47 that the memory is maintained as read-only, executable 48 during code execution. NOTE: This region must be page 49 aligned on start and end in order to properly allow 50 manipulation of the page attributes. 51- label : the name for the reserved partition, if omitted, the label 52 is taken from the node name excluding the unit address. 53 54Example: 55 56sram: sram@5c000000 { 57 compatible = "mmio-sram"; 58 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */ 59 60 #address-cells = <1>; 61 #size-cells = <1>; 62 ranges = <0 0x5c000000 0x40000>; 63 64 smp-sram@100 { 65 compatible = "socvendor,smp-sram"; 66 reg = <0x100 0x50>; 67 }; 68 69 device-sram@1000 { 70 reg = <0x1000 0x1000>; 71 pool; 72 }; 73 74 exported@20000 { 75 reg = <0x20000 0x20000>; 76 export; 77 }; 78};