tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright 2009 VMware, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Michel Dänzer
23 */
24#include <drm/drmP.h>
25#include <drm/amdgpu_drm.h>
26#include "amdgpu.h"
27#include "amdgpu_uvd.h"
28#include "amdgpu_vce.h"
29
30/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
31static void amdgpu_do_test_moves(struct amdgpu_device *adev)
32{
33 struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
34 struct amdgpu_bo *vram_obj = NULL;
35 struct amdgpu_bo **gtt_obj = NULL;
36 struct amdgpu_bo_param bp;
37 uint64_t gart_addr, vram_addr;
38 unsigned n, size;
39 int i, r;
40
41 size = 1024 * 1024;
42
43 /* Number of tests =
44 * (Total GTT - IB pool - writeback page - ring buffers) / test size
45 */
46 n = adev->gmc.gart_size - AMDGPU_IB_POOL_SIZE*64*1024;
47 for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
48 if (adev->rings[i])
49 n -= adev->rings[i]->ring_size;
50 if (adev->wb.wb_obj)
51 n -= AMDGPU_GPU_PAGE_SIZE;
52 if (adev->irq.ih.ring_obj)
53 n -= adev->irq.ih.ring_size;
54 n /= size;
55
56 gtt_obj = kcalloc(n, sizeof(*gtt_obj), GFP_KERNEL);
57 if (!gtt_obj) {
58 DRM_ERROR("Failed to allocate %d pointers\n", n);
59 r = 1;
60 goto out_cleanup;
61 }
62 memset(&bp, 0, sizeof(bp));
63 bp.size = size;
64 bp.byte_align = PAGE_SIZE;
65 bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
66 bp.flags = 0;
67 bp.type = ttm_bo_type_kernel;
68 bp.resv = NULL;
69
70 r = amdgpu_bo_create(adev, &bp, &vram_obj);
71 if (r) {
72 DRM_ERROR("Failed to create VRAM object\n");
73 goto out_cleanup;
74 }
75 r = amdgpu_bo_reserve(vram_obj, false);
76 if (unlikely(r != 0))
77 goto out_unref;
78 r = amdgpu_bo_pin(vram_obj, AMDGPU_GEM_DOMAIN_VRAM, &vram_addr);
79 if (r) {
80 DRM_ERROR("Failed to pin VRAM object\n");
81 goto out_unres;
82 }
83 for (i = 0; i < n; i++) {
84 void *gtt_map, *vram_map;
85 void **gart_start, **gart_end;
86 void **vram_start, **vram_end;
87 struct dma_fence *fence = NULL;
88
89 bp.domain = AMDGPU_GEM_DOMAIN_GTT;
90 r = amdgpu_bo_create(adev, &bp, gtt_obj + i);
91 if (r) {
92 DRM_ERROR("Failed to create GTT object %d\n", i);
93 goto out_lclean;
94 }
95
96 r = amdgpu_bo_reserve(gtt_obj[i], false);
97 if (unlikely(r != 0))
98 goto out_lclean_unref;
99 r = amdgpu_bo_pin(gtt_obj[i], AMDGPU_GEM_DOMAIN_GTT, &gart_addr);
100 if (r) {
101 DRM_ERROR("Failed to pin GTT object %d\n", i);
102 goto out_lclean_unres;
103 }
104
105 r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
106 if (r) {
107 DRM_ERROR("Failed to map GTT object %d\n", i);
108 goto out_lclean_unpin;
109 }
110
111 for (gart_start = gtt_map, gart_end = gtt_map + size;
112 gart_start < gart_end;
113 gart_start++)
114 *gart_start = gart_start;
115
116 amdgpu_bo_kunmap(gtt_obj[i]);
117
118 r = amdgpu_copy_buffer(ring, gart_addr, vram_addr,
119 size, NULL, &fence, false, false);
120
121 if (r) {
122 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
123 goto out_lclean_unpin;
124 }
125
126 r = dma_fence_wait(fence, false);
127 if (r) {
128 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
129 goto out_lclean_unpin;
130 }
131
132 dma_fence_put(fence);
133
134 r = amdgpu_bo_kmap(vram_obj, &vram_map);
135 if (r) {
136 DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
137 goto out_lclean_unpin;
138 }
139
140 for (gart_start = gtt_map, gart_end = gtt_map + size,
141 vram_start = vram_map, vram_end = vram_map + size;
142 vram_start < vram_end;
143 gart_start++, vram_start++) {
144 if (*vram_start != gart_start) {
145 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
146 "expected 0x%p (GTT/VRAM offset "
147 "0x%16llx/0x%16llx)\n",
148 i, *vram_start, gart_start,
149 (unsigned long long)
150 (gart_addr - adev->gmc.gart_start +
151 (void*)gart_start - gtt_map),
152 (unsigned long long)
153 (vram_addr - adev->gmc.vram_start +
154 (void*)gart_start - gtt_map));
155 amdgpu_bo_kunmap(vram_obj);
156 goto out_lclean_unpin;
157 }
158 *vram_start = vram_start;
159 }
160
161 amdgpu_bo_kunmap(vram_obj);
162
163 r = amdgpu_copy_buffer(ring, vram_addr, gart_addr,
164 size, NULL, &fence, false, false);
165
166 if (r) {
167 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
168 goto out_lclean_unpin;
169 }
170
171 r = dma_fence_wait(fence, false);
172 if (r) {
173 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
174 goto out_lclean_unpin;
175 }
176
177 dma_fence_put(fence);
178
179 r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
180 if (r) {
181 DRM_ERROR("Failed to map GTT object after copy %d\n", i);
182 goto out_lclean_unpin;
183 }
184
185 for (gart_start = gtt_map, gart_end = gtt_map + size,
186 vram_start = vram_map, vram_end = vram_map + size;
187 gart_start < gart_end;
188 gart_start++, vram_start++) {
189 if (*gart_start != vram_start) {
190 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
191 "expected 0x%p (VRAM/GTT offset "
192 "0x%16llx/0x%16llx)\n",
193 i, *gart_start, vram_start,
194 (unsigned long long)
195 (vram_addr - adev->gmc.vram_start +
196 (void*)vram_start - vram_map),
197 (unsigned long long)
198 (gart_addr - adev->gmc.gart_start +
199 (void*)vram_start - vram_map));
200 amdgpu_bo_kunmap(gtt_obj[i]);
201 goto out_lclean_unpin;
202 }
203 }
204
205 amdgpu_bo_kunmap(gtt_obj[i]);
206
207 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
208 gart_addr - adev->gmc.gart_start);
209 continue;
210
211out_lclean_unpin:
212 amdgpu_bo_unpin(gtt_obj[i]);
213out_lclean_unres:
214 amdgpu_bo_unreserve(gtt_obj[i]);
215out_lclean_unref:
216 amdgpu_bo_unref(>t_obj[i]);
217out_lclean:
218 for (--i; i >= 0; --i) {
219 amdgpu_bo_unpin(gtt_obj[i]);
220 amdgpu_bo_unreserve(gtt_obj[i]);
221 amdgpu_bo_unref(>t_obj[i]);
222 }
223 if (fence)
224 dma_fence_put(fence);
225 break;
226 }
227
228 amdgpu_bo_unpin(vram_obj);
229out_unres:
230 amdgpu_bo_unreserve(vram_obj);
231out_unref:
232 amdgpu_bo_unref(&vram_obj);
233out_cleanup:
234 kfree(gtt_obj);
235 if (r) {
236 pr_warn("Error while testing BO move\n");
237 }
238}
239
240void amdgpu_test_moves(struct amdgpu_device *adev)
241{
242 if (adev->mman.buffer_funcs)
243 amdgpu_do_test_moves(adev);
244}