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Linux kernel mirror (for testing)
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linux
1Qualcomm MDM9615 TLMM block
2
3This binding describes the Top Level Mode Multiplexer block found in the
4MDM9615 platform.
5
6- compatible:
7 Usage: required
8 Value type: <string>
9 Definition: must be "qcom,mdm9615-pinctrl"
10
11- reg:
12 Usage: required
13 Value type: <prop-encoded-array>
14 Definition: the base address and size of the TLMM register space.
15
16- interrupts:
17 Usage: required
18 Value type: <prop-encoded-array>
19 Definition: should specify the TLMM summary IRQ.
20
21- interrupt-controller:
22 Usage: required
23 Value type: <none>
24 Definition: identifies this node as an interrupt controller
25
26- #interrupt-cells:
27 Usage: required
28 Value type: <u32>
29 Definition: must be 2. Specifying the pin number and flags, as defined
30 in <dt-bindings/interrupt-controller/irq.h>
31
32- gpio-controller:
33 Usage: required
34 Value type: <none>
35 Definition: identifies this node as a gpio controller
36
37- #gpio-cells:
38 Usage: required
39 Value type: <u32>
40 Definition: must be 2. Specifying the pin number and flags, as defined
41 in <dt-bindings/gpio/gpio.h>
42
43Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
44a general description of GPIO and interrupt bindings.
45
46Please refer to pinctrl-bindings.txt in this directory for details of the
47common pinctrl bindings used by client devices, including the meaning of the
48phrase "pin configuration node".
49
50The pin configuration nodes act as a container for an arbitrary number of
51subnodes. Each of these subnodes represents some desired configuration for a
52pin, a group, or a list of pins or groups. This configuration can include the
53mux function to select on those pin(s)/group(s), and various pin configuration
54parameters, such as pull-up, drive strength, etc.
55
56
57PIN CONFIGURATION NODES:
58
59The name of each subnode is not important; all subnodes should be enumerated
60and processed purely based on their content.
61
62Each subnode only affects those parameters that are explicitly listed. In
63other words, a subnode that lists a mux function but no pin configuration
64parameters implies no information about any pin configuration parameters.
65Similarly, a pin subnode that describes a pullup parameter implies no
66information about e.g. the mux function.
67
68
69The following generic properties as defined in pinctrl-bindings.txt are valid
70to specify in a pin configuration subnode:
71
72- pins:
73 Usage: required
74 Value type: <string-array>
75 Definition: List of gpio pins affected by the properties specified in
76 this subnode. Valid pins are:
77 gpio0-gpio87
78
79- function:
80 Usage: required
81 Value type: <string>
82 Definition: Specify the alternative function to be configured for the
83 specified pins.
84 Valid values are:
85 gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
86 sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio,
87 cdc_mclk
88
89- bias-disable:
90 Usage: optional
91 Value type: <none>
92 Definition: The specified pins should be configued as no pull.
93
94- bias-pull-down:
95 Usage: optional
96 Value type: <none>
97 Definition: The specified pins should be configued as pull down.
98
99- bias-pull-up:
100 Usage: optional
101 Value type: <none>
102 Definition: The specified pins should be configued as pull up.
103
104- output-high:
105 Usage: optional
106 Value type: <none>
107 Definition: The specified pins are configured in output mode, driven
108 high.
109
110- output-low:
111 Usage: optional
112 Value type: <none>
113 Definition: The specified pins are configured in output mode, driven
114 low.
115
116- drive-strength:
117 Usage: optional
118 Value type: <u32>
119 Definition: Selects the drive strength for the specified pins, in mA.
120 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
121
122Example:
123
124 msmgpio: pinctrl@800000 {
125 compatible = "qcom,mdm9615-pinctrl";
126 reg = <0x800000 0x4000>;
127
128 gpio-controller;
129 #gpio-cells = <2>;
130 interrupt-controller;
131 #interrupt-cells = <2>;
132 interrupts = <0 16 0x4>;
133
134 gsbi8_uart: gsbi8-uart {
135 mux {
136 pins = "gpio34", "gpio35";
137 function = "gsbi8";
138 };
139
140 tx {
141 pins = "gpio34";
142 drive-strength = <4>;
143 bias-disable;
144 };
145
146 rx {
147 pins = "gpio35";
148 drive-strength = <2>;
149 bias-pull-up;
150 };
151 };
152 };