tjh.dev
Linux kernel mirror (for testing)
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linux
1/* SPDX-License-Identifier: GPL-2.0 */
2/******************************************************************************
3 *
4 * Copyright(c) 2009-2012 Realtek Corporation.
5 *
6 * Contact Information:
7 * wlanfae <wlanfae@realtek.com>
8 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
9 * Hsinchu 300, Taiwan.
10 *
11 * Larry Finger <Larry.Finger@lwfinger.net>
12 *
13 *****************************************************************************/
14
15#ifndef __RTL8723E_PWRSEQCMD_H__
16#define __RTL8723E_PWRSEQCMD_H__
17
18#include "wifi.h"
19/*---------------------------------------------
20 * 3 The value of cmd: 4 bits
21 *---------------------------------------------
22 */
23#define PWR_CMD_READ 0x00
24#define PWR_CMD_WRITE 0x01
25#define PWR_CMD_POLLING 0x02
26#define PWR_CMD_DELAY 0x03
27#define PWR_CMD_END 0x04
28
29/* define the base address of each block */
30#define PWR_BASEADDR_MAC 0x00
31#define PWR_BASEADDR_USB 0x01
32#define PWR_BASEADDR_PCIE 0x02
33#define PWR_BASEADDR_SDIO 0x03
34
35#define PWR_INTF_SDIO_MSK BIT(0)
36#define PWR_INTF_USB_MSK BIT(1)
37#define PWR_INTF_PCI_MSK BIT(2)
38#define PWR_INTF_ALL_MSK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
39
40#define PWR_FAB_TSMC_MSK BIT(0)
41#define PWR_FAB_UMC_MSK BIT(1)
42#define PWR_FAB_ALL_MSK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
43
44#define PWR_CUT_TESTCHIP_MSK BIT(0)
45#define PWR_CUT_A_MSK BIT(1)
46#define PWR_CUT_B_MSK BIT(2)
47#define PWR_CUT_C_MSK BIT(3)
48#define PWR_CUT_D_MSK BIT(4)
49#define PWR_CUT_E_MSK BIT(5)
50#define PWR_CUT_F_MSK BIT(6)
51#define PWR_CUT_G_MSK BIT(7)
52#define PWR_CUT_ALL_MSK 0xFF
53
54enum pwrseq_delay_unit {
55 PWRSEQ_DELAY_US,
56 PWRSEQ_DELAY_MS,
57};
58
59struct wlan_pwr_cfg {
60 u16 offset;
61 u8 cut_msk;
62 u8 fab_msk:4;
63 u8 interface_msk:4;
64 u8 base:4;
65 u8 cmd:4;
66 u8 msk;
67 u8 value;
68};
69
70#define GET_PWR_CFG_OFFSET(__PWR_CMD) (__PWR_CMD.offset)
71#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) (__PWR_CMD.cut_msk)
72#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) (__PWR_CMD.fab_msk)
73#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) (__PWR_CMD.interface_msk)
74#define GET_PWR_CFG_BASE(__PWR_CMD) (__PWR_CMD.base)
75#define GET_PWR_CFG_CMD(__PWR_CMD) (__PWR_CMD.cmd)
76#define GET_PWR_CFG_MASK(__PWR_CMD) (__PWR_CMD.msk)
77#define GET_PWR_CFG_VALUE(__PWR_CMD) (__PWR_CMD.value)
78
79bool rtl_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
80 u8 fab_version, u8 interface_type,
81 struct wlan_pwr_cfg pwrcfgcmd[]);
82
83#endif