Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
5 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
10
11if CRYPTO_HW
12
13config CRYPTO_DEV_PADLOCK
14 tristate "Support for VIA PadLock ACE"
15 depends on X86 && !UML
16 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
21
22 The instructions are used only when the CPU supports them.
23 Otherwise software encryption is used.
24
25config CRYPTO_DEV_PADLOCK_AES
26 tristate "PadLock driver for AES algorithm"
27 depends on CRYPTO_DEV_PADLOCK
28 select CRYPTO_BLKCIPHER
29 select CRYPTO_AES
30 help
31 Use VIA PadLock for AES algorithm.
32
33 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
36 called padlock-aes.
37
38config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
41 select CRYPTO_HASH
42 select CRYPTO_SHA1
43 select CRYPTO_SHA256
44 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
50 called padlock-sha.
51
52config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
54 depends on X86_32 && PCI
55 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
57 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
59 engine for the CryptoAPI AES algorithm.
60
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
64config ZCRYPT
65 tristate "Support for s390 cryptographic adapters"
66 depends on S390
67 select HW_RANDOM
68 help
69 Select this option if you want to enable support for
70 s390 cryptographic adapters like:
71 + PCI-X Cryptographic Coprocessor (PCIXCC)
72 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
75
76config PKEY
77 tristate "Kernel API for protected key handling"
78 depends on S390
79 depends on ZCRYPT
80 help
81 With this option enabled the pkey kernel module provides an API
82 for creation and handling of protected keys. Other parts of the
83 kernel or userspace applications may use these functions.
84
85 Select this option if you want to enable the kernel and userspace
86 API for proteced key handling.
87
88 Please note that creation of protected keys from secure keys
89 requires to have at least one CEX card in coprocessor mode
90 available at runtime.
91
92config CRYPTO_PAES_S390
93 tristate "PAES cipher algorithms"
94 depends on S390
95 depends on ZCRYPT
96 depends on PKEY
97 select CRYPTO_ALGAPI
98 select CRYPTO_BLKCIPHER
99 help
100 This is the s390 hardware accelerated implementation of the
101 AES cipher algorithms for use with protected key.
102
103 Select this option if you want to use the paes cipher
104 for example to use protected key encrypted devices.
105
106config CRYPTO_SHA1_S390
107 tristate "SHA1 digest algorithm"
108 depends on S390
109 select CRYPTO_HASH
110 help
111 This is the s390 hardware accelerated implementation of the
112 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
113
114 It is available as of z990.
115
116config CRYPTO_SHA256_S390
117 tristate "SHA256 digest algorithm"
118 depends on S390
119 select CRYPTO_HASH
120 help
121 This is the s390 hardware accelerated implementation of the
122 SHA256 secure hash standard (DFIPS 180-2).
123
124 It is available as of z9.
125
126config CRYPTO_SHA512_S390
127 tristate "SHA384 and SHA512 digest algorithm"
128 depends on S390
129 select CRYPTO_HASH
130 help
131 This is the s390 hardware accelerated implementation of the
132 SHA512 secure hash standard.
133
134 It is available as of z10.
135
136config CRYPTO_DES_S390
137 tristate "DES and Triple DES cipher algorithms"
138 depends on S390
139 select CRYPTO_ALGAPI
140 select CRYPTO_BLKCIPHER
141 select CRYPTO_DES
142 help
143 This is the s390 hardware accelerated implementation of the
144 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
145
146 As of z990 the ECB and CBC mode are hardware accelerated.
147 As of z196 the CTR mode is hardware accelerated.
148
149config CRYPTO_AES_S390
150 tristate "AES cipher algorithms"
151 depends on S390
152 select CRYPTO_ALGAPI
153 select CRYPTO_BLKCIPHER
154 help
155 This is the s390 hardware accelerated implementation of the
156 AES cipher algorithms (FIPS-197).
157
158 As of z9 the ECB and CBC modes are hardware accelerated
159 for 128 bit keys.
160 As of z10 the ECB and CBC modes are hardware accelerated
161 for all AES key sizes.
162 As of z196 the CTR mode is hardware accelerated for all AES
163 key sizes and XTS mode is hardware accelerated for 256 and
164 512 bit keys.
165
166config S390_PRNG
167 tristate "Pseudo random number generator device driver"
168 depends on S390
169 default "m"
170 help
171 Select this option if you want to use the s390 pseudo random number
172 generator. The PRNG is part of the cryptographic processor functions
173 and uses triple-DES to generate secure random numbers like the
174 ANSI X9.17 standard. User-space programs access the
175 pseudo-random-number device through the char device /dev/prandom.
176
177 It is available as of z9.
178
179config CRYPTO_GHASH_S390
180 tristate "GHASH digest algorithm"
181 depends on S390
182 select CRYPTO_HASH
183 help
184 This is the s390 hardware accelerated implementation of the
185 GHASH message digest algorithm for GCM (Galois/Counter Mode).
186
187 It is available as of z196.
188
189config CRYPTO_CRC32_S390
190 tristate "CRC-32 algorithms"
191 depends on S390
192 select CRYPTO_HASH
193 select CRC32
194 help
195 Select this option if you want to use hardware accelerated
196 implementations of CRC algorithms. With this option, you
197 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
198 and CRC-32C (Castagnoli).
199
200 It is available with IBM z13 or later.
201
202config CRYPTO_DEV_MARVELL_CESA
203 tristate "Marvell's Cryptographic Engine driver"
204 depends on PLAT_ORION || ARCH_MVEBU
205 select CRYPTO_AES
206 select CRYPTO_DES
207 select CRYPTO_BLKCIPHER
208 select CRYPTO_HASH
209 select SRAM
210 help
211 This driver allows you to utilize the Cryptographic Engines and
212 Security Accelerator (CESA) which can be found on MVEBU and ORION
213 platforms.
214 This driver supports CPU offload through DMA transfers.
215
216config CRYPTO_DEV_NIAGARA2
217 tristate "Niagara2 Stream Processing Unit driver"
218 select CRYPTO_DES
219 select CRYPTO_BLKCIPHER
220 select CRYPTO_HASH
221 select CRYPTO_MD5
222 select CRYPTO_SHA1
223 select CRYPTO_SHA256
224 depends on SPARC64
225 help
226 Each core of a Niagara2 processor contains a Stream
227 Processing Unit, which itself contains several cryptographic
228 sub-units. One set provides the Modular Arithmetic Unit,
229 used for SSL offload. The other set provides the Cipher
230 Group, which can perform encryption, decryption, hashing,
231 checksumming, and raw copies.
232
233config CRYPTO_DEV_HIFN_795X
234 tristate "Driver HIFN 795x crypto accelerator chips"
235 select CRYPTO_DES
236 select CRYPTO_BLKCIPHER
237 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
238 depends on PCI
239 depends on !ARCH_DMA_ADDR_T_64BIT
240 help
241 This option allows you to have support for HIFN 795x crypto adapters.
242
243config CRYPTO_DEV_HIFN_795X_RNG
244 bool "HIFN 795x random number generator"
245 depends on CRYPTO_DEV_HIFN_795X
246 help
247 Select this option if you want to enable the random number generator
248 on the HIFN 795x crypto adapters.
249
250source drivers/crypto/caam/Kconfig
251
252config CRYPTO_DEV_TALITOS
253 tristate "Talitos Freescale Security Engine (SEC)"
254 select CRYPTO_AEAD
255 select CRYPTO_AUTHENC
256 select CRYPTO_BLKCIPHER
257 select CRYPTO_HASH
258 select HW_RANDOM
259 depends on FSL_SOC
260 help
261 Say 'Y' here to use the Freescale Security Engine (SEC)
262 to offload cryptographic algorithm computation.
263
264 The Freescale SEC is present on PowerQUICC 'E' processors, such
265 as the MPC8349E and MPC8548E.
266
267 To compile this driver as a module, choose M here: the module
268 will be called talitos.
269
270config CRYPTO_DEV_TALITOS1
271 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
272 depends on CRYPTO_DEV_TALITOS
273 depends on PPC_8xx || PPC_82xx
274 default y
275 help
276 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
277 found on MPC82xx or the Freescale Security Engine (SEC Lite)
278 version 1.2 found on MPC8xx
279
280config CRYPTO_DEV_TALITOS2
281 bool "SEC2+ (SEC version 2.0 or upper)"
282 depends on CRYPTO_DEV_TALITOS
283 default y if !PPC_8xx
284 help
285 Say 'Y' here to use the Freescale Security Engine (SEC)
286 version 2 and following as found on MPC83xx, MPC85xx, etc ...
287
288config CRYPTO_DEV_IXP4XX
289 tristate "Driver for IXP4xx crypto hardware acceleration"
290 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
291 select CRYPTO_DES
292 select CRYPTO_AEAD
293 select CRYPTO_AUTHENC
294 select CRYPTO_BLKCIPHER
295 help
296 Driver for the IXP4xx NPE crypto engine.
297
298config CRYPTO_DEV_PPC4XX
299 tristate "Driver AMCC PPC4xx crypto accelerator"
300 depends on PPC && 4xx
301 select CRYPTO_HASH
302 select CRYPTO_AEAD
303 select CRYPTO_AES
304 select CRYPTO_CCM
305 select CRYPTO_CTR
306 select CRYPTO_GCM
307 select CRYPTO_BLKCIPHER
308 help
309 This option allows you to have support for AMCC crypto acceleration.
310
311config HW_RANDOM_PPC4XX
312 bool "PowerPC 4xx generic true random number generator support"
313 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
314 default y
315 ---help---
316 This option provides the kernel-side support for the TRNG hardware
317 found in the security function of some PowerPC 4xx SoCs.
318
319config CRYPTO_DEV_OMAP
320 tristate "Support for OMAP crypto HW accelerators"
321 depends on ARCH_OMAP2PLUS
322 help
323 OMAP processors have various crypto HW accelerators. Select this if
324 you want to use the OMAP modules for any of the crypto algorithms.
325
326if CRYPTO_DEV_OMAP
327
328config CRYPTO_DEV_OMAP_SHAM
329 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
330 depends on ARCH_OMAP2PLUS
331 select CRYPTO_SHA1
332 select CRYPTO_MD5
333 select CRYPTO_SHA256
334 select CRYPTO_SHA512
335 select CRYPTO_HMAC
336 help
337 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
338 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
339
340config CRYPTO_DEV_OMAP_AES
341 tristate "Support for OMAP AES hw engine"
342 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
343 select CRYPTO_AES
344 select CRYPTO_BLKCIPHER
345 select CRYPTO_ENGINE
346 select CRYPTO_CBC
347 select CRYPTO_ECB
348 select CRYPTO_CTR
349 select CRYPTO_AEAD
350 help
351 OMAP processors have AES module accelerator. Select this if you
352 want to use the OMAP module for AES algorithms.
353
354config CRYPTO_DEV_OMAP_DES
355 tristate "Support for OMAP DES/3DES hw engine"
356 depends on ARCH_OMAP2PLUS
357 select CRYPTO_DES
358 select CRYPTO_BLKCIPHER
359 select CRYPTO_ENGINE
360 help
361 OMAP processors have DES/3DES module accelerator. Select this if you
362 want to use the OMAP module for DES and 3DES algorithms. Currently
363 the ECB and CBC modes of operation are supported by the driver. Also
364 accesses made on unaligned boundaries are supported.
365
366endif # CRYPTO_DEV_OMAP
367
368config CRYPTO_DEV_PICOXCELL
369 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
370 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
371 select CRYPTO_AEAD
372 select CRYPTO_AES
373 select CRYPTO_AUTHENC
374 select CRYPTO_BLKCIPHER
375 select CRYPTO_DES
376 select CRYPTO_CBC
377 select CRYPTO_ECB
378 select CRYPTO_SEQIV
379 help
380 This option enables support for the hardware offload engines in the
381 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
382 and for 3gpp Layer 2 ciphering support.
383
384 Saying m here will build a module named pipcoxcell_crypto.
385
386config CRYPTO_DEV_SAHARA
387 tristate "Support for SAHARA crypto accelerator"
388 depends on ARCH_MXC && OF
389 select CRYPTO_BLKCIPHER
390 select CRYPTO_AES
391 select CRYPTO_ECB
392 help
393 This option enables support for the SAHARA HW crypto accelerator
394 found in some Freescale i.MX chips.
395
396config CRYPTO_DEV_MXC_SCC
397 tristate "Support for Freescale Security Controller (SCC)"
398 depends on ARCH_MXC && OF
399 select CRYPTO_BLKCIPHER
400 select CRYPTO_DES
401 help
402 This option enables support for the Security Controller (SCC)
403 found in Freescale i.MX25 chips.
404
405config CRYPTO_DEV_EXYNOS_RNG
406 tristate "EXYNOS HW pseudo random number generator support"
407 depends on ARCH_EXYNOS || COMPILE_TEST
408 depends on HAS_IOMEM
409 select CRYPTO_RNG
410 ---help---
411 This driver provides kernel-side support through the
412 cryptographic API for the pseudo random number generator hardware
413 found on Exynos SoCs.
414
415 To compile this driver as a module, choose M here: the
416 module will be called exynos-rng.
417
418 If unsure, say Y.
419
420config CRYPTO_DEV_S5P
421 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
422 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
423 depends on HAS_IOMEM
424 select CRYPTO_AES
425 select CRYPTO_BLKCIPHER
426 help
427 This option allows you to have support for S5P crypto acceleration.
428 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
429 algorithms execution.
430
431config CRYPTO_DEV_EXYNOS_HASH
432 bool "Support for Samsung Exynos HASH accelerator"
433 depends on CRYPTO_DEV_S5P
434 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
435 select CRYPTO_SHA1
436 select CRYPTO_MD5
437 select CRYPTO_SHA256
438 help
439 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
440 This will select software SHA1, MD5 and SHA256 as they are
441 needed for small and zero-size messages.
442 HASH algorithms will be disabled if EXYNOS_RNG
443 is enabled due to hw conflict.
444
445config CRYPTO_DEV_NX
446 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
447 depends on PPC64
448 help
449 This enables support for the NX hardware cryptographic accelerator
450 coprocessor that is in IBM PowerPC P7+ or later processors. This
451 does not actually enable any drivers, it only allows you to select
452 which acceleration type (encryption and/or compression) to enable.
453
454if CRYPTO_DEV_NX
455 source "drivers/crypto/nx/Kconfig"
456endif
457
458config CRYPTO_DEV_UX500
459 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
460 depends on ARCH_U8500
461 help
462 Driver for ST-Ericsson UX500 crypto engine.
463
464if CRYPTO_DEV_UX500
465 source "drivers/crypto/ux500/Kconfig"
466endif # if CRYPTO_DEV_UX500
467
468config CRYPTO_DEV_ATMEL_AUTHENC
469 tristate "Support for Atmel IPSEC/SSL hw accelerator"
470 depends on ARCH_AT91 || COMPILE_TEST
471 select CRYPTO_AUTHENC
472 select CRYPTO_DEV_ATMEL_AES
473 select CRYPTO_DEV_ATMEL_SHA
474 help
475 Some Atmel processors can combine the AES and SHA hw accelerators
476 to enhance support of IPSEC/SSL.
477 Select this if you want to use the Atmel modules for
478 authenc(hmac(shaX),Y(cbc)) algorithms.
479
480config CRYPTO_DEV_ATMEL_AES
481 tristate "Support for Atmel AES hw accelerator"
482 depends on ARCH_AT91 || COMPILE_TEST
483 select CRYPTO_AES
484 select CRYPTO_AEAD
485 select CRYPTO_BLKCIPHER
486 help
487 Some Atmel processors have AES hw accelerator.
488 Select this if you want to use the Atmel module for
489 AES algorithms.
490
491 To compile this driver as a module, choose M here: the module
492 will be called atmel-aes.
493
494config CRYPTO_DEV_ATMEL_TDES
495 tristate "Support for Atmel DES/TDES hw accelerator"
496 depends on ARCH_AT91 || COMPILE_TEST
497 select CRYPTO_DES
498 select CRYPTO_BLKCIPHER
499 help
500 Some Atmel processors have DES/TDES hw accelerator.
501 Select this if you want to use the Atmel module for
502 DES/TDES algorithms.
503
504 To compile this driver as a module, choose M here: the module
505 will be called atmel-tdes.
506
507config CRYPTO_DEV_ATMEL_SHA
508 tristate "Support for Atmel SHA hw accelerator"
509 depends on ARCH_AT91 || COMPILE_TEST
510 select CRYPTO_HASH
511 help
512 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
513 hw accelerator.
514 Select this if you want to use the Atmel module for
515 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
516
517 To compile this driver as a module, choose M here: the module
518 will be called atmel-sha.
519
520config CRYPTO_DEV_ATMEL_ECC
521 tristate "Support for Microchip / Atmel ECC hw accelerator"
522 depends on ARCH_AT91 || COMPILE_TEST
523 depends on I2C
524 select CRYPTO_ECDH
525 select CRC16
526 help
527 Microhip / Atmel ECC hw accelerator.
528 Select this if you want to use the Microchip / Atmel module for
529 ECDH algorithm.
530
531 To compile this driver as a module, choose M here: the module
532 will be called atmel-ecc.
533
534config CRYPTO_DEV_CCP
535 bool "Support for AMD Secure Processor"
536 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
537 help
538 The AMD Secure Processor provides support for the Cryptographic Coprocessor
539 (CCP) and the Platform Security Processor (PSP) devices.
540
541if CRYPTO_DEV_CCP
542 source "drivers/crypto/ccp/Kconfig"
543endif
544
545config CRYPTO_DEV_MXS_DCP
546 tristate "Support for Freescale MXS DCP"
547 depends on (ARCH_MXS || ARCH_MXC)
548 select STMP_DEVICE
549 select CRYPTO_CBC
550 select CRYPTO_ECB
551 select CRYPTO_AES
552 select CRYPTO_BLKCIPHER
553 select CRYPTO_HASH
554 help
555 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
556 co-processor on the die.
557
558 To compile this driver as a module, choose M here: the module
559 will be called mxs-dcp.
560
561source "drivers/crypto/qat/Kconfig"
562source "drivers/crypto/cavium/cpt/Kconfig"
563source "drivers/crypto/cavium/nitrox/Kconfig"
564
565config CRYPTO_DEV_CAVIUM_ZIP
566 tristate "Cavium ZIP driver"
567 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
568 ---help---
569 Select this option if you want to enable compression/decompression
570 acceleration on Cavium's ARM based SoCs
571
572config CRYPTO_DEV_QCE
573 tristate "Qualcomm crypto engine accelerator"
574 depends on ARCH_QCOM || COMPILE_TEST
575 depends on HAS_IOMEM
576 select CRYPTO_AES
577 select CRYPTO_DES
578 select CRYPTO_ECB
579 select CRYPTO_CBC
580 select CRYPTO_XTS
581 select CRYPTO_CTR
582 select CRYPTO_BLKCIPHER
583 help
584 This driver supports Qualcomm crypto engine accelerator
585 hardware. To compile this driver as a module, choose M here. The
586 module will be called qcrypto.
587
588config CRYPTO_DEV_VMX
589 bool "Support for VMX cryptographic acceleration instructions"
590 depends on PPC64 && VSX
591 help
592 Support for VMX cryptographic acceleration instructions.
593
594source "drivers/crypto/vmx/Kconfig"
595
596config CRYPTO_DEV_IMGTEC_HASH
597 tristate "Imagination Technologies hardware hash accelerator"
598 depends on MIPS || COMPILE_TEST
599 select CRYPTO_MD5
600 select CRYPTO_SHA1
601 select CRYPTO_SHA256
602 select CRYPTO_HASH
603 help
604 This driver interfaces with the Imagination Technologies
605 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
606 hashing algorithms.
607
608config CRYPTO_DEV_SUN4I_SS
609 tristate "Support for Allwinner Security System cryptographic accelerator"
610 depends on ARCH_SUNXI && !64BIT
611 select CRYPTO_MD5
612 select CRYPTO_SHA1
613 select CRYPTO_AES
614 select CRYPTO_DES
615 select CRYPTO_BLKCIPHER
616 help
617 Some Allwinner SoC have a crypto accelerator named
618 Security System. Select this if you want to use it.
619 The Security System handle AES/DES/3DES ciphers in CBC mode
620 and SHA1 and MD5 hash algorithms.
621
622 To compile this driver as a module, choose M here: the module
623 will be called sun4i-ss.
624
625config CRYPTO_DEV_SUN4I_SS_PRNG
626 bool "Support for Allwinner Security System PRNG"
627 depends on CRYPTO_DEV_SUN4I_SS
628 select CRYPTO_RNG
629 help
630 Select this option if you want to provide kernel-side support for
631 the Pseudo-Random Number Generator found in the Security System.
632
633config CRYPTO_DEV_ROCKCHIP
634 tristate "Rockchip's Cryptographic Engine driver"
635 depends on OF && ARCH_ROCKCHIP
636 select CRYPTO_AES
637 select CRYPTO_DES
638 select CRYPTO_MD5
639 select CRYPTO_SHA1
640 select CRYPTO_SHA256
641 select CRYPTO_HASH
642 select CRYPTO_BLKCIPHER
643
644 help
645 This driver interfaces with the hardware crypto accelerator.
646 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
647
648config CRYPTO_DEV_MEDIATEK
649 tristate "MediaTek's EIP97 Cryptographic Engine driver"
650 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
651 select CRYPTO_AES
652 select CRYPTO_AEAD
653 select CRYPTO_BLKCIPHER
654 select CRYPTO_CTR
655 select CRYPTO_SHA1
656 select CRYPTO_SHA256
657 select CRYPTO_SHA512
658 select CRYPTO_HMAC
659 help
660 This driver allows you to utilize the hardware crypto accelerator
661 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
662 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
663
664source "drivers/crypto/chelsio/Kconfig"
665
666source "drivers/crypto/virtio/Kconfig"
667
668config CRYPTO_DEV_BCM_SPU
669 tristate "Broadcom symmetric crypto/hash acceleration support"
670 depends on ARCH_BCM_IPROC
671 depends on MAILBOX
672 default m
673 select CRYPTO_DES
674 select CRYPTO_MD5
675 select CRYPTO_SHA1
676 select CRYPTO_SHA256
677 select CRYPTO_SHA512
678 help
679 This driver provides support for Broadcom crypto acceleration using the
680 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
681 ahash, and aead algorithms with the kernel cryptographic API.
682
683source "drivers/crypto/stm32/Kconfig"
684
685config CRYPTO_DEV_SAFEXCEL
686 tristate "Inside Secure's SafeXcel cryptographic engine driver"
687 depends on OF
688 depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
689 select CRYPTO_AES
690 select CRYPTO_AUTHENC
691 select CRYPTO_BLKCIPHER
692 select CRYPTO_HASH
693 select CRYPTO_HMAC
694 select CRYPTO_SHA1
695 select CRYPTO_SHA256
696 select CRYPTO_SHA512
697 help
698 This driver interfaces with the SafeXcel EIP-197 cryptographic engine
699 designed by Inside Secure. Select this if you want to use CBC/ECB
700 chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
701 algorithms.
702
703config CRYPTO_DEV_ARTPEC6
704 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
705 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
706 depends on OF
707 select CRYPTO_AEAD
708 select CRYPTO_AES
709 select CRYPTO_ALGAPI
710 select CRYPTO_BLKCIPHER
711 select CRYPTO_CTR
712 select CRYPTO_HASH
713 select CRYPTO_SHA1
714 select CRYPTO_SHA256
715 select CRYPTO_SHA512
716 help
717 Enables the driver for the on-chip crypto accelerator
718 of Axis ARTPEC SoCs.
719
720 To compile this driver as a module, choose M here.
721
722config CRYPTO_DEV_CCREE
723 tristate "Support for ARM TrustZone CryptoCell family of security processors"
724 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
725 default n
726 select CRYPTO_HASH
727 select CRYPTO_BLKCIPHER
728 select CRYPTO_DES
729 select CRYPTO_AEAD
730 select CRYPTO_AUTHENC
731 select CRYPTO_SHA1
732 select CRYPTO_MD5
733 select CRYPTO_SHA256
734 select CRYPTO_SHA512
735 select CRYPTO_HMAC
736 select CRYPTO_AES
737 select CRYPTO_CBC
738 select CRYPTO_ECB
739 select CRYPTO_CTR
740 select CRYPTO_XTS
741 help
742 Say 'Y' to enable a driver for the REE interface of the Arm
743 TrustZone CryptoCell family of processors. Currently the
744 CryptoCell 712, 710 and 630 are supported.
745 Choose this if you wish to use hardware acceleration of
746 cryptographic operations on the system REE.
747 If unsure say Y.
748
749endif # CRYPTO_HW