tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13#ifndef __NFIT_TEST_H__
14#define __NFIT_TEST_H__
15#include <linux/list.h>
16#include <linux/uuid.h>
17#include <linux/ioport.h>
18#include <linux/spinlock_types.h>
19
20struct nfit_test_request {
21 struct list_head list;
22 struct resource res;
23};
24
25struct nfit_test_resource {
26 struct list_head requests;
27 struct list_head list;
28 struct resource res;
29 struct device *dev;
30 spinlock_t lock;
31 int req_count;
32 void *buf;
33};
34
35#define ND_TRANSLATE_SPA_STATUS_INVALID_SPA 2
36#define NFIT_ARS_INJECT_INVALID 2
37
38enum err_inj_options {
39 ND_ARS_ERR_INJ_OPT_NOTIFY = 0,
40};
41
42/* nfit commands */
43enum nfit_cmd_num {
44 NFIT_CMD_TRANSLATE_SPA = 5,
45 NFIT_CMD_ARS_INJECT_SET = 7,
46 NFIT_CMD_ARS_INJECT_CLEAR = 8,
47 NFIT_CMD_ARS_INJECT_GET = 9,
48};
49
50struct nd_cmd_translate_spa {
51 __u64 spa;
52 __u32 status;
53 __u8 flags;
54 __u8 _reserved[3];
55 __u64 translate_length;
56 __u32 num_nvdimms;
57 struct nd_nvdimm_device {
58 __u32 nfit_device_handle;
59 __u32 _reserved;
60 __u64 dpa;
61 } __packed devices[0];
62
63} __packed;
64
65struct nd_cmd_ars_err_inj {
66 __u64 err_inj_spa_range_base;
67 __u64 err_inj_spa_range_length;
68 __u8 err_inj_options;
69 __u32 status;
70} __packed;
71
72struct nd_cmd_ars_err_inj_clr {
73 __u64 err_inj_clr_spa_range_base;
74 __u64 err_inj_clr_spa_range_length;
75 __u32 status;
76} __packed;
77
78struct nd_cmd_ars_err_inj_stat {
79 __u32 status;
80 __u32 inj_err_rec_count;
81 struct nd_error_stat_query_record {
82 __u64 err_inj_stat_spa_range_base;
83 __u64 err_inj_stat_spa_range_length;
84 } __packed record[0];
85} __packed;
86
87#define ND_INTEL_SMART 1
88#define ND_INTEL_SMART_THRESHOLD 2
89#define ND_INTEL_ENABLE_LSS_STATUS 10
90#define ND_INTEL_FW_GET_INFO 12
91#define ND_INTEL_FW_START_UPDATE 13
92#define ND_INTEL_FW_SEND_DATA 14
93#define ND_INTEL_FW_FINISH_UPDATE 15
94#define ND_INTEL_FW_FINISH_QUERY 16
95#define ND_INTEL_SMART_SET_THRESHOLD 17
96#define ND_INTEL_SMART_INJECT 18
97
98#define ND_INTEL_SMART_HEALTH_VALID (1 << 0)
99#define ND_INTEL_SMART_SPARES_VALID (1 << 1)
100#define ND_INTEL_SMART_USED_VALID (1 << 2)
101#define ND_INTEL_SMART_MTEMP_VALID (1 << 3)
102#define ND_INTEL_SMART_CTEMP_VALID (1 << 4)
103#define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID (1 << 5)
104#define ND_INTEL_SMART_AIT_STATUS_VALID (1 << 6)
105#define ND_INTEL_SMART_PTEMP_VALID (1 << 7)
106#define ND_INTEL_SMART_ALARM_VALID (1 << 9)
107#define ND_INTEL_SMART_SHUTDOWN_VALID (1 << 10)
108#define ND_INTEL_SMART_VENDOR_VALID (1 << 11)
109#define ND_INTEL_SMART_SPARE_TRIP (1 << 0)
110#define ND_INTEL_SMART_TEMP_TRIP (1 << 1)
111#define ND_INTEL_SMART_CTEMP_TRIP (1 << 2)
112#define ND_INTEL_SMART_NON_CRITICAL_HEALTH (1 << 0)
113#define ND_INTEL_SMART_CRITICAL_HEALTH (1 << 1)
114#define ND_INTEL_SMART_FATAL_HEALTH (1 << 2)
115#define ND_INTEL_SMART_INJECT_MTEMP (1 << 0)
116#define ND_INTEL_SMART_INJECT_SPARE (1 << 1)
117#define ND_INTEL_SMART_INJECT_FATAL (1 << 2)
118#define ND_INTEL_SMART_INJECT_SHUTDOWN (1 << 3)
119
120struct nd_intel_smart {
121 __u32 status;
122 union {
123 struct {
124 __u32 flags;
125 __u8 reserved0[4];
126 __u8 health;
127 __u8 spares;
128 __u8 life_used;
129 __u8 alarm_flags;
130 __u16 media_temperature;
131 __u16 ctrl_temperature;
132 __u32 shutdown_count;
133 __u8 ait_status;
134 __u16 pmic_temperature;
135 __u8 reserved1[8];
136 __u8 shutdown_state;
137 __u32 vendor_size;
138 __u8 vendor_data[92];
139 } __packed;
140 __u8 data[128];
141 };
142} __packed;
143
144struct nd_intel_smart_threshold {
145 __u32 status;
146 union {
147 struct {
148 __u16 alarm_control;
149 __u8 spares;
150 __u16 media_temperature;
151 __u16 ctrl_temperature;
152 __u8 reserved[1];
153 } __packed;
154 __u8 data[8];
155 };
156} __packed;
157
158struct nd_intel_smart_set_threshold {
159 __u16 alarm_control;
160 __u8 spares;
161 __u16 media_temperature;
162 __u16 ctrl_temperature;
163 __u32 status;
164} __packed;
165
166struct nd_intel_smart_inject {
167 __u64 flags;
168 __u8 mtemp_enable;
169 __u16 media_temperature;
170 __u8 spare_enable;
171 __u8 spares;
172 __u8 fatal_enable;
173 __u8 unsafe_shutdown_enable;
174 __u32 status;
175} __packed;
176
177#define INTEL_FW_STORAGE_SIZE 0x100000
178#define INTEL_FW_MAX_SEND_LEN 0xFFEC
179#define INTEL_FW_QUERY_INTERVAL 250000
180#define INTEL_FW_QUERY_MAX_TIME 3000000
181#define INTEL_FW_FIS_VERSION 0x0105
182#define INTEL_FW_FAKE_VERSION 0xffffffffabcd
183
184enum intel_fw_update_state {
185 FW_STATE_NEW = 0,
186 FW_STATE_IN_PROGRESS,
187 FW_STATE_VERIFY,
188 FW_STATE_UPDATED,
189};
190
191struct nd_intel_fw_info {
192 __u32 status;
193 __u32 storage_size;
194 __u32 max_send_len;
195 __u32 query_interval;
196 __u32 max_query_time;
197 __u8 update_cap;
198 __u8 reserved[3];
199 __u32 fis_version;
200 __u64 run_version;
201 __u64 updated_version;
202} __packed;
203
204struct nd_intel_fw_start {
205 __u32 status;
206 __u32 context;
207} __packed;
208
209/* this one has the output first because the variable input data size */
210struct nd_intel_fw_send_data {
211 __u32 context;
212 __u32 offset;
213 __u32 length;
214 __u8 data[0];
215/* this field is not declared due ot variable data from input */
216/* __u32 status; */
217} __packed;
218
219struct nd_intel_fw_finish_update {
220 __u8 ctrl_flags;
221 __u8 reserved[3];
222 __u32 context;
223 __u32 status;
224} __packed;
225
226struct nd_intel_fw_finish_query {
227 __u32 context;
228 __u32 status;
229 __u64 updated_fw_rev;
230} __packed;
231
232struct nd_intel_lss {
233 __u8 enable;
234 __u32 status;
235} __packed;
236
237union acpi_object;
238typedef void *acpi_handle;
239
240typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t);
241typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle,
242 const guid_t *guid, u64 rev, u64 func,
243 union acpi_object *argv4);
244void __iomem *__wrap_ioremap_nocache(resource_size_t offset,
245 unsigned long size);
246void __wrap_iounmap(volatile void __iomem *addr);
247void nfit_test_setup(nfit_test_lookup_fn lookup,
248 nfit_test_evaluate_dsm_fn evaluate);
249void nfit_test_teardown(void);
250struct nfit_test_resource *get_nfit_res(resource_size_t resource);
251#endif