tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1/* Driver for Realtek PCI-Express card reader
2 *
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
17 *
18 * Author:
19 * Wei WANG <wei_wang@realsil.com.cn>
20 */
21
22#ifndef __RTSX_PCR_H
23#define __RTSX_PCR_H
24
25#include <linux/rtsx_pci.h>
26
27#define MIN_DIV_N_PCR 80
28#define MAX_DIV_N_PCR 208
29
30#define RTS522A_PM_CTRL3 0xFF7E
31
32#define RTS524A_PME_FORCE_CTL 0xFF78
33#define RTS524A_PM_CTRL3 0xFF7E
34
35#define LTR_ACTIVE_LATENCY_DEF 0x883C
36#define LTR_IDLE_LATENCY_DEF 0x892C
37#define LTR_L1OFF_LATENCY_DEF 0x9003
38#define L1_SNOOZE_DELAY_DEF 1
39#define LTR_L1OFF_SSPWRGATE_5249_DEF 0xAF
40#define LTR_L1OFF_SSPWRGATE_5250_DEF 0xFF
41#define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF 0xAC
42#define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF 0xF8
43#define CMD_TIMEOUT_DEF 100
44#define ASPM_MASK_NEG 0xFC
45#define MASK_8_BIT_DEF 0xFF
46
47#define SSC_CLOCK_STABLE_WAIT 130
48
49int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
50int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
51
52void rts5209_init_params(struct rtsx_pcr *pcr);
53void rts5229_init_params(struct rtsx_pcr *pcr);
54void rtl8411_init_params(struct rtsx_pcr *pcr);
55void rtl8402_init_params(struct rtsx_pcr *pcr);
56void rts5227_init_params(struct rtsx_pcr *pcr);
57void rts522a_init_params(struct rtsx_pcr *pcr);
58void rts5249_init_params(struct rtsx_pcr *pcr);
59void rts524a_init_params(struct rtsx_pcr *pcr);
60void rts525a_init_params(struct rtsx_pcr *pcr);
61void rtl8411b_init_params(struct rtsx_pcr *pcr);
62void rts5260_init_params(struct rtsx_pcr *pcr);
63
64static inline u8 map_sd_drive(int idx)
65{
66 u8 sd_drive[4] = {
67 0x01, /* Type D */
68 0x02, /* Type C */
69 0x05, /* Type A */
70 0x03 /* Type B */
71 };
72
73 return sd_drive[idx];
74}
75
76#define rtsx_vendor_setting_valid(reg) (!((reg) & 0x1000000))
77#define rts5209_vendor_setting1_valid(reg) (!((reg) & 0x80))
78#define rts5209_vendor_setting2_valid(reg) ((reg) & 0x80)
79
80#define rtsx_reg_to_aspm(reg) (((reg) >> 28) & 0x03)
81#define rtsx_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 26) & 0x03)
82#define rtsx_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x03)
83#define rtsx_reg_to_card_drive_sel(reg) ((((reg) >> 25) & 0x01) << 6)
84#define rtsx_reg_check_reverse_socket(reg) ((reg) & 0x4000)
85#define rts5209_reg_to_aspm(reg) (((reg) >> 5) & 0x03)
86#define rts5209_reg_check_ms_pmos(reg) (!((reg) & 0x08))
87#define rts5209_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 3) & 0x07)
88#define rts5209_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x07)
89#define rts5209_reg_to_card_drive_sel(reg) ((reg) >> 8)
90#define rtl8411_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x07)
91#define rtl8411b_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x03)
92
93#define set_pull_ctrl_tables(pcr, __device) \
94do { \
95 pcr->sd_pull_ctl_enable_tbl = __device##_sd_pull_ctl_enable_tbl; \
96 pcr->sd_pull_ctl_disable_tbl = __device##_sd_pull_ctl_disable_tbl; \
97 pcr->ms_pull_ctl_enable_tbl = __device##_ms_pull_ctl_enable_tbl; \
98 pcr->ms_pull_ctl_disable_tbl = __device##_ms_pull_ctl_disable_tbl; \
99} while (0)
100
101/* generic operations */
102int rtsx_gops_pm_reset(struct rtsx_pcr *pcr);
103int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency);
104int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val);
105void rtsx_pci_init_ocp(struct rtsx_pcr *pcr);
106void rtsx_pci_disable_ocp(struct rtsx_pcr *pcr);
107void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr);
108int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val);
109void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr);
110int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr);
111int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr);
112
113#endif