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1Qualcomm PMIC GPIO block 2 3This binding describes the GPIO block(s) found in the 8xxx series of 4PMIC's from Qualcomm. 5 6- compatible: 7 Usage: required 8 Value type: <string> 9 Definition: must be one of: 10 "qcom,pm8018-gpio" 11 "qcom,pm8038-gpio" 12 "qcom,pm8058-gpio" 13 "qcom,pm8916-gpio" 14 "qcom,pm8917-gpio" 15 "qcom,pm8921-gpio" 16 "qcom,pm8941-gpio" 17 "qcom,pm8994-gpio" 18 "qcom,pmi8994-gpio" 19 "qcom,pma8084-gpio" 20 "qcom,pmi8994-gpio" 21 22 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio" 23 if the device is on an spmi bus or an ssbi bus respectively 24 25- reg: 26 Usage: required 27 Value type: <prop-encoded-array> 28 Definition: Register base of the GPIO block and length. 29 30- interrupts: 31 Usage: required 32 Value type: <prop-encoded-array> 33 Definition: Must contain an array of encoded interrupt specifiers for 34 each available GPIO 35 36- gpio-controller: 37 Usage: required 38 Value type: <none> 39 Definition: Mark the device node as a GPIO controller 40 41- #gpio-cells: 42 Usage: required 43 Value type: <u32> 44 Definition: Must be 2; 45 the first cell will be used to define gpio number and the 46 second denotes the flags for this gpio 47 48Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for 49a general description of GPIO and interrupt bindings. 50 51Please refer to pinctrl-bindings.txt in this directory for details of the 52common pinctrl bindings used by client devices, including the meaning of the 53phrase "pin configuration node". 54 55The pin configuration nodes act as a container for an arbitrary number of 56subnodes. Each of these subnodes represents some desired configuration for a 57pin or a list of pins. This configuration can include the 58mux function to select on those pin(s), and various pin configuration 59parameters, as listed below. 60 61 62SUBNODES: 63 64The name of each subnode is not important; all subnodes should be enumerated 65and processed purely based on their content. 66 67Each subnode only affects those parameters that are explicitly listed. In 68other words, a subnode that lists a mux function but no pin configuration 69parameters implies no information about any pin configuration parameters. 70Similarly, a pin subnode that describes a pullup parameter implies no 71information about e.g. the mux function. 72 73The following generic properties as defined in pinctrl-bindings.txt are valid 74to specify in a pin configuration subnode: 75 76- pins: 77 Usage: required 78 Value type: <string-array> 79 Definition: List of gpio pins affected by the properties specified in 80 this subnode. Valid pins are: 81 gpio1-gpio6 for pm8018 82 gpio1-gpio12 for pm8038 83 gpio1-gpio40 for pm8058 84 gpio1-gpio4 for pm8916 85 gpio1-gpio38 for pm8917 86 gpio1-gpio44 for pm8921 87 gpio1-gpio36 for pm8941 88 gpio1-gpio22 for pm8994 89 gpio1-gpio10 for pmi8994 90 gpio1-gpio22 for pma8084 91 gpio1-gpio10 for pmi8994 92 93- function: 94 Usage: required 95 Value type: <string> 96 Definition: Specify the alternative function to be configured for the 97 specified pins. Valid values are: 98 "normal", 99 "paired", 100 "func1", 101 "func2", 102 "dtest1", 103 "dtest2", 104 "dtest3", 105 "dtest4", 106 And following values are supported by LV/MV GPIO subtypes: 107 "func3", 108 "func4" 109 110- bias-disable: 111 Usage: optional 112 Value type: <none> 113 Definition: The specified pins should be configured as no pull. 114 115- bias-pull-down: 116 Usage: optional 117 Value type: <none> 118 Definition: The specified pins should be configured as pull down. 119 120- bias-pull-up: 121 Usage: optional 122 Value type: <empty> 123 Definition: The specified pins should be configured as pull up. 124 125- qcom,pull-up-strength: 126 Usage: optional 127 Value type: <u32> 128 Definition: Specifies the strength to use for pull up, if selected. 129 Valid values are; as defined in 130 <dt-bindings/pinctrl/qcom,pmic-gpio.h>: 131 1: 30uA (PMIC_GPIO_PULL_UP_30) 132 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5) 133 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5) 134 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30) 135 If this property is omitted 30uA strength will be used if 136 pull up is selected 137 138- bias-high-impedance: 139 Usage: optional 140 Value type: <none> 141 Definition: The specified pins will put in high-Z mode and disabled. 142 143- input-enable: 144 Usage: optional 145 Value type: <none> 146 Definition: The specified pins are put in input mode. 147 148- output-high: 149 Usage: optional 150 Value type: <none> 151 Definition: The specified pins are configured in output mode, driven 152 high. 153 154- output-low: 155 Usage: optional 156 Value type: <none> 157 Definition: The specified pins are configured in output mode, driven 158 low. 159 160- power-source: 161 Usage: optional 162 Value type: <u32> 163 Definition: Selects the power source for the specified pins. Valid 164 power sources are defined per chip in 165 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 166 167- qcom,drive-strength: 168 Usage: optional 169 Value type: <u32> 170 Definition: Selects the drive strength for the specified pins. Value 171 drive strengths are: 172 0: no (PMIC_GPIO_STRENGTH_NO) 173 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V 174 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V 175 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V 176 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h> 177 178- drive-push-pull: 179 Usage: optional 180 Value type: <none> 181 Definition: The specified pins are configured in push-pull mode. 182 183- drive-open-drain: 184 Usage: optional 185 Value type: <none> 186 Definition: The specified pins are configured in open-drain mode. 187 188- drive-open-source: 189 Usage: optional 190 Value type: <none> 191 Definition: The specified pins are configured in open-source mode. 192 193- qcom,analog-pass: 194 Usage: optional 195 Value type: <none> 196 Definition: The specified pins are configured in analog-pass-through mode. 197 198- qcom,atest: 199 Usage: optional 200 Value type: <u32> 201 Definition: Selects ATEST rail to route to GPIO when it's configured 202 in analog-pass-through mode. 203 Valid values are 1-4 corresponding to ATEST1 to ATEST4. 204 205- qcom,dtest-buffer: 206 Usage: optional 207 Value type: <u32> 208 Definition: Selects DTEST rail to route to GPIO when it's configured 209 as digital input. 210 Valid values are 1-4 corresponding to DTEST1 to DTEST4. 211 212Example: 213 214 pm8921_gpio: gpio@150 { 215 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio"; 216 reg = <0x150 0x160>; 217 interrupts = <192 1>, <193 1>, <194 1>, 218 <195 1>, <196 1>, <197 1>, 219 <198 1>, <199 1>, <200 1>, 220 <201 1>, <202 1>, <203 1>, 221 <204 1>, <205 1>, <206 1>, 222 <207 1>, <208 1>, <209 1>, 223 <210 1>, <211 1>, <212 1>, 224 <213 1>, <214 1>, <215 1>, 225 <216 1>, <217 1>, <218 1>, 226 <219 1>, <220 1>, <221 1>, 227 <222 1>, <223 1>, <224 1>, 228 <225 1>, <226 1>, <227 1>, 229 <228 1>, <229 1>, <230 1>, 230 <231 1>, <232 1>, <233 1>, 231 <234 1>, <235 1>; 232 233 gpio-controller; 234 #gpio-cells = <2>; 235 236 pm8921_gpio_keys: gpio-keys { 237 volume-keys { 238 pins = "gpio20", "gpio21"; 239 function = "normal"; 240 241 input-enable; 242 bias-pull-up; 243 drive-push-pull; 244 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 245 power-source = <PM8921_GPIO_S4>; 246 }; 247 }; 248 };