Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef NVM_H
3#define NVM_H
4
5#include <linux/blkdev.h>
6#include <linux/types.h>
7#include <uapi/linux/lightnvm.h>
8
9enum {
10 NVM_IO_OK = 0,
11 NVM_IO_REQUEUE = 1,
12 NVM_IO_DONE = 2,
13 NVM_IO_ERR = 3,
14
15 NVM_IOTYPE_NONE = 0,
16 NVM_IOTYPE_GC = 1,
17};
18
19#define NVM_BLK_BITS (16)
20#define NVM_PG_BITS (16)
21#define NVM_SEC_BITS (8)
22#define NVM_PL_BITS (8)
23#define NVM_LUN_BITS (8)
24#define NVM_CH_BITS (7)
25
26struct ppa_addr {
27 /* Generic structure for all addresses */
28 union {
29 struct {
30 u64 blk : NVM_BLK_BITS;
31 u64 pg : NVM_PG_BITS;
32 u64 sec : NVM_SEC_BITS;
33 u64 pl : NVM_PL_BITS;
34 u64 lun : NVM_LUN_BITS;
35 u64 ch : NVM_CH_BITS;
36 u64 reserved : 1;
37 } g;
38
39 struct {
40 u64 line : 63;
41 u64 is_cached : 1;
42 } c;
43
44 u64 ppa;
45 };
46};
47
48struct nvm_rq;
49struct nvm_id;
50struct nvm_dev;
51struct nvm_tgt_dev;
52
53typedef int (nvm_id_fn)(struct nvm_dev *, struct nvm_id *);
54typedef int (nvm_op_bb_tbl_fn)(struct nvm_dev *, struct ppa_addr, u8 *);
55typedef int (nvm_op_set_bb_fn)(struct nvm_dev *, struct ppa_addr *, int, int);
56typedef int (nvm_submit_io_fn)(struct nvm_dev *, struct nvm_rq *);
57typedef int (nvm_submit_io_sync_fn)(struct nvm_dev *, struct nvm_rq *);
58typedef void *(nvm_create_dma_pool_fn)(struct nvm_dev *, char *);
59typedef void (nvm_destroy_dma_pool_fn)(void *);
60typedef void *(nvm_dev_dma_alloc_fn)(struct nvm_dev *, void *, gfp_t,
61 dma_addr_t *);
62typedef void (nvm_dev_dma_free_fn)(void *, void*, dma_addr_t);
63
64struct nvm_dev_ops {
65 nvm_id_fn *identity;
66 nvm_op_bb_tbl_fn *get_bb_tbl;
67 nvm_op_set_bb_fn *set_bb_tbl;
68
69 nvm_submit_io_fn *submit_io;
70 nvm_submit_io_sync_fn *submit_io_sync;
71
72 nvm_create_dma_pool_fn *create_dma_pool;
73 nvm_destroy_dma_pool_fn *destroy_dma_pool;
74 nvm_dev_dma_alloc_fn *dev_dma_alloc;
75 nvm_dev_dma_free_fn *dev_dma_free;
76
77 unsigned int max_phys_sect;
78};
79
80#ifdef CONFIG_NVM
81
82#include <linux/blkdev.h>
83#include <linux/file.h>
84#include <linux/dmapool.h>
85#include <uapi/linux/lightnvm.h>
86
87enum {
88 /* HW Responsibilities */
89 NVM_RSP_L2P = 1 << 0,
90 NVM_RSP_ECC = 1 << 1,
91
92 /* Physical Adressing Mode */
93 NVM_ADDRMODE_LINEAR = 0,
94 NVM_ADDRMODE_CHANNEL = 1,
95
96 /* Plane programming mode for LUN */
97 NVM_PLANE_SINGLE = 1,
98 NVM_PLANE_DOUBLE = 2,
99 NVM_PLANE_QUAD = 4,
100
101 /* Status codes */
102 NVM_RSP_SUCCESS = 0x0,
103 NVM_RSP_NOT_CHANGEABLE = 0x1,
104 NVM_RSP_ERR_FAILWRITE = 0x40ff,
105 NVM_RSP_ERR_EMPTYPAGE = 0x42ff,
106 NVM_RSP_ERR_FAILECC = 0x4281,
107 NVM_RSP_ERR_FAILCRC = 0x4004,
108 NVM_RSP_WARN_HIGHECC = 0x4700,
109
110 /* Device opcodes */
111 NVM_OP_PWRITE = 0x91,
112 NVM_OP_PREAD = 0x92,
113 NVM_OP_ERASE = 0x90,
114
115 /* PPA Command Flags */
116 NVM_IO_SNGL_ACCESS = 0x0,
117 NVM_IO_DUAL_ACCESS = 0x1,
118 NVM_IO_QUAD_ACCESS = 0x2,
119
120 /* NAND Access Modes */
121 NVM_IO_SUSPEND = 0x80,
122 NVM_IO_SLC_MODE = 0x100,
123 NVM_IO_SCRAMBLE_ENABLE = 0x200,
124
125 /* Block Types */
126 NVM_BLK_T_FREE = 0x0,
127 NVM_BLK_T_BAD = 0x1,
128 NVM_BLK_T_GRWN_BAD = 0x2,
129 NVM_BLK_T_DEV = 0x4,
130 NVM_BLK_T_HOST = 0x8,
131
132 /* Memory capabilities */
133 NVM_ID_CAP_SLC = 0x1,
134 NVM_ID_CAP_CMD_SUSPEND = 0x2,
135 NVM_ID_CAP_SCRAMBLE = 0x4,
136 NVM_ID_CAP_ENCRYPT = 0x8,
137
138 /* Memory types */
139 NVM_ID_FMTYPE_SLC = 0,
140 NVM_ID_FMTYPE_MLC = 1,
141
142 /* Device capabilities */
143 NVM_ID_DCAP_BBLKMGMT = 0x1,
144 NVM_UD_DCAP_ECC = 0x2,
145};
146
147struct nvm_id_lp_mlc {
148 u16 num_pairs;
149 u8 pairs[886];
150};
151
152struct nvm_id_lp_tbl {
153 __u8 id[8];
154 struct nvm_id_lp_mlc mlc;
155};
156
157struct nvm_id_group {
158 u8 mtype;
159 u8 fmtype;
160 u8 num_ch;
161 u8 num_lun;
162 u16 num_chk;
163 u16 clba;
164 u16 csecs;
165 u16 sos;
166
167 u16 ws_min;
168 u16 ws_opt;
169 u16 ws_seq;
170 u16 ws_per_chk;
171
172 u32 trdt;
173 u32 trdm;
174 u32 tprt;
175 u32 tprm;
176 u32 tbet;
177 u32 tbem;
178 u32 mpos;
179 u32 mccap;
180 u16 cpar;
181
182 /* 1.2 compatibility */
183 u8 num_pln;
184 u16 num_pg;
185 u16 fpg_sz;
186};
187
188struct nvm_addr_format {
189 u8 ch_offset;
190 u8 ch_len;
191 u8 lun_offset;
192 u8 lun_len;
193 u8 pln_offset;
194 u8 pln_len;
195 u8 blk_offset;
196 u8 blk_len;
197 u8 pg_offset;
198 u8 pg_len;
199 u8 sect_offset;
200 u8 sect_len;
201};
202
203struct nvm_id {
204 u8 ver_id;
205 u8 vmnt;
206 u32 cap;
207 u32 dom;
208 struct nvm_addr_format ppaf;
209 struct nvm_id_group grp;
210} __packed;
211
212struct nvm_target {
213 struct list_head list;
214 struct nvm_tgt_dev *dev;
215 struct nvm_tgt_type *type;
216 struct gendisk *disk;
217};
218
219#define ADDR_EMPTY (~0ULL)
220
221#define NVM_TARGET_DEFAULT_OP (101)
222#define NVM_TARGET_MIN_OP (3)
223#define NVM_TARGET_MAX_OP (80)
224
225#define NVM_VERSION_MAJOR 1
226#define NVM_VERSION_MINOR 0
227#define NVM_VERSION_PATCH 0
228
229struct nvm_rq;
230typedef void (nvm_end_io_fn)(struct nvm_rq *);
231
232struct nvm_rq {
233 struct nvm_tgt_dev *dev;
234
235 struct bio *bio;
236
237 union {
238 struct ppa_addr ppa_addr;
239 dma_addr_t dma_ppa_list;
240 };
241
242 struct ppa_addr *ppa_list;
243
244 void *meta_list;
245 dma_addr_t dma_meta_list;
246
247 nvm_end_io_fn *end_io;
248
249 uint8_t opcode;
250 uint16_t nr_ppas;
251 uint16_t flags;
252
253 u64 ppa_status; /* ppa media status */
254 int error;
255
256 void *private;
257};
258
259static inline struct nvm_rq *nvm_rq_from_pdu(void *pdu)
260{
261 return pdu - sizeof(struct nvm_rq);
262}
263
264static inline void *nvm_rq_to_pdu(struct nvm_rq *rqdata)
265{
266 return rqdata + 1;
267}
268
269enum {
270 NVM_BLK_ST_FREE = 0x1, /* Free block */
271 NVM_BLK_ST_TGT = 0x2, /* Block in use by target */
272 NVM_BLK_ST_BAD = 0x8, /* Bad block */
273};
274
275
276/* Device generic information */
277struct nvm_geo {
278 /* generic geometry */
279 int nr_chnls;
280 int all_luns; /* across channels */
281 int nr_luns; /* per channel */
282 int nr_chks; /* per lun */
283
284 int sec_size;
285 int oob_size;
286 int mccap;
287
288 int sec_per_chk;
289 int sec_per_lun;
290
291 int ws_min;
292 int ws_opt;
293 int ws_seq;
294 int ws_per_chk;
295
296 int max_rq_size;
297
298 int op;
299
300 struct nvm_addr_format ppaf;
301
302 /* Legacy 1.2 specific geometry */
303 int plane_mode; /* drive device in single, double or quad mode */
304 int nr_planes;
305 int sec_per_pg; /* only sectors for a single page */
306 int sec_per_pl; /* all sectors across planes */
307};
308
309/* sub-device structure */
310struct nvm_tgt_dev {
311 /* Device information */
312 struct nvm_geo geo;
313
314 /* Base ppas for target LUNs */
315 struct ppa_addr *luns;
316
317 sector_t total_secs;
318
319 struct nvm_id identity;
320 struct request_queue *q;
321
322 struct nvm_dev *parent;
323 void *map;
324};
325
326struct nvm_dev {
327 struct nvm_dev_ops *ops;
328
329 struct list_head devices;
330
331 /* Device information */
332 struct nvm_geo geo;
333
334 unsigned long total_secs;
335
336 unsigned long *lun_map;
337 void *dma_pool;
338
339 struct nvm_id identity;
340
341 /* Backend device */
342 struct request_queue *q;
343 char name[DISK_NAME_LEN];
344 void *private_data;
345
346 void *rmap;
347
348 struct mutex mlock;
349 spinlock_t lock;
350
351 /* target management */
352 struct list_head area_list;
353 struct list_head targets;
354};
355
356static inline struct ppa_addr generic_to_dev_addr(struct nvm_tgt_dev *tgt_dev,
357 struct ppa_addr r)
358{
359 struct nvm_geo *geo = &tgt_dev->geo;
360 struct ppa_addr l;
361
362 l.ppa = ((u64)r.g.blk) << geo->ppaf.blk_offset;
363 l.ppa |= ((u64)r.g.pg) << geo->ppaf.pg_offset;
364 l.ppa |= ((u64)r.g.sec) << geo->ppaf.sect_offset;
365 l.ppa |= ((u64)r.g.pl) << geo->ppaf.pln_offset;
366 l.ppa |= ((u64)r.g.lun) << geo->ppaf.lun_offset;
367 l.ppa |= ((u64)r.g.ch) << geo->ppaf.ch_offset;
368
369 return l;
370}
371
372static inline struct ppa_addr dev_to_generic_addr(struct nvm_tgt_dev *tgt_dev,
373 struct ppa_addr r)
374{
375 struct nvm_geo *geo = &tgt_dev->geo;
376 struct ppa_addr l;
377
378 l.ppa = 0;
379 /*
380 * (r.ppa << X offset) & X len bitmask. X eq. blk, pg, etc.
381 */
382 l.g.blk = (r.ppa >> geo->ppaf.blk_offset) &
383 (((1 << geo->ppaf.blk_len) - 1));
384 l.g.pg |= (r.ppa >> geo->ppaf.pg_offset) &
385 (((1 << geo->ppaf.pg_len) - 1));
386 l.g.sec |= (r.ppa >> geo->ppaf.sect_offset) &
387 (((1 << geo->ppaf.sect_len) - 1));
388 l.g.pl |= (r.ppa >> geo->ppaf.pln_offset) &
389 (((1 << geo->ppaf.pln_len) - 1));
390 l.g.lun |= (r.ppa >> geo->ppaf.lun_offset) &
391 (((1 << geo->ppaf.lun_len) - 1));
392 l.g.ch |= (r.ppa >> geo->ppaf.ch_offset) &
393 (((1 << geo->ppaf.ch_len) - 1));
394
395 return l;
396}
397
398typedef blk_qc_t (nvm_tgt_make_rq_fn)(struct request_queue *, struct bio *);
399typedef sector_t (nvm_tgt_capacity_fn)(void *);
400typedef void *(nvm_tgt_init_fn)(struct nvm_tgt_dev *, struct gendisk *,
401 int flags);
402typedef void (nvm_tgt_exit_fn)(void *);
403typedef int (nvm_tgt_sysfs_init_fn)(struct gendisk *);
404typedef void (nvm_tgt_sysfs_exit_fn)(struct gendisk *);
405
406struct nvm_tgt_type {
407 const char *name;
408 unsigned int version[3];
409
410 /* target entry points */
411 nvm_tgt_make_rq_fn *make_rq;
412 nvm_tgt_capacity_fn *capacity;
413
414 /* module-specific init/teardown */
415 nvm_tgt_init_fn *init;
416 nvm_tgt_exit_fn *exit;
417
418 /* sysfs */
419 nvm_tgt_sysfs_init_fn *sysfs_init;
420 nvm_tgt_sysfs_exit_fn *sysfs_exit;
421
422 /* For internal use */
423 struct list_head list;
424 struct module *owner;
425};
426
427extern int nvm_register_tgt_type(struct nvm_tgt_type *);
428extern void nvm_unregister_tgt_type(struct nvm_tgt_type *);
429
430extern void *nvm_dev_dma_alloc(struct nvm_dev *, gfp_t, dma_addr_t *);
431extern void nvm_dev_dma_free(struct nvm_dev *, void *, dma_addr_t);
432
433extern struct nvm_dev *nvm_alloc_dev(int);
434extern int nvm_register(struct nvm_dev *);
435extern void nvm_unregister(struct nvm_dev *);
436
437extern int nvm_set_tgt_bb_tbl(struct nvm_tgt_dev *, struct ppa_addr *,
438 int, int);
439extern int nvm_max_phys_sects(struct nvm_tgt_dev *);
440extern int nvm_submit_io(struct nvm_tgt_dev *, struct nvm_rq *);
441extern int nvm_submit_io_sync(struct nvm_tgt_dev *, struct nvm_rq *);
442extern void nvm_end_io(struct nvm_rq *);
443extern int nvm_bb_tbl_fold(struct nvm_dev *, u8 *, int);
444extern int nvm_get_tgt_bb_tbl(struct nvm_tgt_dev *, struct ppa_addr, u8 *);
445
446#else /* CONFIG_NVM */
447struct nvm_dev_ops;
448
449static inline struct nvm_dev *nvm_alloc_dev(int node)
450{
451 return ERR_PTR(-EINVAL);
452}
453static inline int nvm_register(struct nvm_dev *dev)
454{
455 return -EINVAL;
456}
457static inline void nvm_unregister(struct nvm_dev *dev) {}
458#endif /* CONFIG_NVM */
459#endif /* LIGHTNVM.H */