tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_PARAVIRT_H
3#define _ASM_X86_PARAVIRT_H
4/* Various instructions on x86 need to be replaced for
5 * para-virtualization: those hooks are defined here. */
6
7#ifdef CONFIG_PARAVIRT
8#include <asm/pgtable_types.h>
9#include <asm/asm.h>
10#include <asm/nospec-branch.h>
11
12#include <asm/paravirt_types.h>
13
14#ifndef __ASSEMBLY__
15#include <linux/bug.h>
16#include <linux/types.h>
17#include <linux/cpumask.h>
18#include <asm/frame.h>
19
20static inline void load_sp0(unsigned long sp0)
21{
22 PVOP_VCALL1(pv_cpu_ops.load_sp0, sp0);
23}
24
25/* The paravirtualized CPUID instruction. */
26static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
27 unsigned int *ecx, unsigned int *edx)
28{
29 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
30}
31
32/*
33 * These special macros can be used to get or set a debugging register
34 */
35static inline unsigned long paravirt_get_debugreg(int reg)
36{
37 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
38}
39#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
40static inline void set_debugreg(unsigned long val, int reg)
41{
42 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
43}
44
45static inline unsigned long read_cr0(void)
46{
47 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
48}
49
50static inline void write_cr0(unsigned long x)
51{
52 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
53}
54
55static inline unsigned long read_cr2(void)
56{
57 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
58}
59
60static inline void write_cr2(unsigned long x)
61{
62 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
63}
64
65static inline unsigned long __read_cr3(void)
66{
67 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
68}
69
70static inline void write_cr3(unsigned long x)
71{
72 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
73}
74
75static inline void __write_cr4(unsigned long x)
76{
77 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
78}
79
80#ifdef CONFIG_X86_64
81static inline unsigned long read_cr8(void)
82{
83 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
84}
85
86static inline void write_cr8(unsigned long x)
87{
88 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
89}
90#endif
91
92static inline void arch_safe_halt(void)
93{
94 PVOP_VCALL0(pv_irq_ops.safe_halt);
95}
96
97static inline void halt(void)
98{
99 PVOP_VCALL0(pv_irq_ops.halt);
100}
101
102static inline void wbinvd(void)
103{
104 PVOP_VCALL0(pv_cpu_ops.wbinvd);
105}
106
107#define get_kernel_rpl() (pv_info.kernel_rpl)
108
109static inline u64 paravirt_read_msr(unsigned msr)
110{
111 return PVOP_CALL1(u64, pv_cpu_ops.read_msr, msr);
112}
113
114static inline void paravirt_write_msr(unsigned msr,
115 unsigned low, unsigned high)
116{
117 PVOP_VCALL3(pv_cpu_ops.write_msr, msr, low, high);
118}
119
120static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
121{
122 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_safe, msr, err);
123}
124
125static inline int paravirt_write_msr_safe(unsigned msr,
126 unsigned low, unsigned high)
127{
128 return PVOP_CALL3(int, pv_cpu_ops.write_msr_safe, msr, low, high);
129}
130
131#define rdmsr(msr, val1, val2) \
132do { \
133 u64 _l = paravirt_read_msr(msr); \
134 val1 = (u32)_l; \
135 val2 = _l >> 32; \
136} while (0)
137
138#define wrmsr(msr, val1, val2) \
139do { \
140 paravirt_write_msr(msr, val1, val2); \
141} while (0)
142
143#define rdmsrl(msr, val) \
144do { \
145 val = paravirt_read_msr(msr); \
146} while (0)
147
148static inline void wrmsrl(unsigned msr, u64 val)
149{
150 wrmsr(msr, (u32)val, (u32)(val>>32));
151}
152
153#define wrmsr_safe(msr, a, b) paravirt_write_msr_safe(msr, a, b)
154
155/* rdmsr with exception handling */
156#define rdmsr_safe(msr, a, b) \
157({ \
158 int _err; \
159 u64 _l = paravirt_read_msr_safe(msr, &_err); \
160 (*a) = (u32)_l; \
161 (*b) = _l >> 32; \
162 _err; \
163})
164
165static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
166{
167 int err;
168
169 *p = paravirt_read_msr_safe(msr, &err);
170 return err;
171}
172
173static inline unsigned long long paravirt_sched_clock(void)
174{
175 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
176}
177
178struct static_key;
179extern struct static_key paravirt_steal_enabled;
180extern struct static_key paravirt_steal_rq_enabled;
181
182static inline u64 paravirt_steal_clock(int cpu)
183{
184 return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
185}
186
187static inline unsigned long long paravirt_read_pmc(int counter)
188{
189 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
190}
191
192#define rdpmc(counter, low, high) \
193do { \
194 u64 _l = paravirt_read_pmc(counter); \
195 low = (u32)_l; \
196 high = _l >> 32; \
197} while (0)
198
199#define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
200
201static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
202{
203 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
204}
205
206static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
207{
208 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
209}
210
211static inline void load_TR_desc(void)
212{
213 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
214}
215static inline void load_gdt(const struct desc_ptr *dtr)
216{
217 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
218}
219static inline void load_idt(const struct desc_ptr *dtr)
220{
221 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
222}
223static inline void set_ldt(const void *addr, unsigned entries)
224{
225 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
226}
227static inline unsigned long paravirt_store_tr(void)
228{
229 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
230}
231#define store_tr(tr) ((tr) = paravirt_store_tr())
232static inline void load_TLS(struct thread_struct *t, unsigned cpu)
233{
234 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
235}
236
237#ifdef CONFIG_X86_64
238static inline void load_gs_index(unsigned int gs)
239{
240 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
241}
242#endif
243
244static inline void write_ldt_entry(struct desc_struct *dt, int entry,
245 const void *desc)
246{
247 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
248}
249
250static inline void write_gdt_entry(struct desc_struct *dt, int entry,
251 void *desc, int type)
252{
253 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
254}
255
256static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
257{
258 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
259}
260static inline void set_iopl_mask(unsigned mask)
261{
262 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
263}
264
265/* The paravirtualized I/O functions */
266static inline void slow_down_io(void)
267{
268 pv_cpu_ops.io_delay();
269#ifdef REALLY_SLOW_IO
270 pv_cpu_ops.io_delay();
271 pv_cpu_ops.io_delay();
272 pv_cpu_ops.io_delay();
273#endif
274}
275
276static inline void paravirt_activate_mm(struct mm_struct *prev,
277 struct mm_struct *next)
278{
279 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
280}
281
282static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
283 struct mm_struct *mm)
284{
285 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
286}
287
288static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
289{
290 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
291}
292
293static inline void __flush_tlb(void)
294{
295 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
296}
297static inline void __flush_tlb_global(void)
298{
299 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
300}
301static inline void __flush_tlb_one_user(unsigned long addr)
302{
303 PVOP_VCALL1(pv_mmu_ops.flush_tlb_one_user, addr);
304}
305
306static inline void flush_tlb_others(const struct cpumask *cpumask,
307 const struct flush_tlb_info *info)
308{
309 PVOP_VCALL2(pv_mmu_ops.flush_tlb_others, cpumask, info);
310}
311
312static inline int paravirt_pgd_alloc(struct mm_struct *mm)
313{
314 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
315}
316
317static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
318{
319 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
320}
321
322static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
323{
324 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
325}
326static inline void paravirt_release_pte(unsigned long pfn)
327{
328 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
329}
330
331static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
332{
333 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
334}
335
336static inline void paravirt_release_pmd(unsigned long pfn)
337{
338 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
339}
340
341static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
342{
343 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
344}
345static inline void paravirt_release_pud(unsigned long pfn)
346{
347 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
348}
349
350static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long pfn)
351{
352 PVOP_VCALL2(pv_mmu_ops.alloc_p4d, mm, pfn);
353}
354
355static inline void paravirt_release_p4d(unsigned long pfn)
356{
357 PVOP_VCALL1(pv_mmu_ops.release_p4d, pfn);
358}
359
360static inline pte_t __pte(pteval_t val)
361{
362 pteval_t ret;
363
364 if (sizeof(pteval_t) > sizeof(long))
365 ret = PVOP_CALLEE2(pteval_t,
366 pv_mmu_ops.make_pte,
367 val, (u64)val >> 32);
368 else
369 ret = PVOP_CALLEE1(pteval_t,
370 pv_mmu_ops.make_pte,
371 val);
372
373 return (pte_t) { .pte = ret };
374}
375
376static inline pteval_t pte_val(pte_t pte)
377{
378 pteval_t ret;
379
380 if (sizeof(pteval_t) > sizeof(long))
381 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
382 pte.pte, (u64)pte.pte >> 32);
383 else
384 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
385 pte.pte);
386
387 return ret;
388}
389
390static inline pgd_t __pgd(pgdval_t val)
391{
392 pgdval_t ret;
393
394 if (sizeof(pgdval_t) > sizeof(long))
395 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
396 val, (u64)val >> 32);
397 else
398 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
399 val);
400
401 return (pgd_t) { ret };
402}
403
404static inline pgdval_t pgd_val(pgd_t pgd)
405{
406 pgdval_t ret;
407
408 if (sizeof(pgdval_t) > sizeof(long))
409 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
410 pgd.pgd, (u64)pgd.pgd >> 32);
411 else
412 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
413 pgd.pgd);
414
415 return ret;
416}
417
418#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
419static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
420 pte_t *ptep)
421{
422 pteval_t ret;
423
424 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
425 mm, addr, ptep);
426
427 return (pte_t) { .pte = ret };
428}
429
430static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
431 pte_t *ptep, pte_t pte)
432{
433 if (sizeof(pteval_t) > sizeof(long))
434 /* 5 arg words */
435 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
436 else
437 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
438 mm, addr, ptep, pte.pte);
439}
440
441static inline void set_pte(pte_t *ptep, pte_t pte)
442{
443 if (sizeof(pteval_t) > sizeof(long))
444 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
445 pte.pte, (u64)pte.pte >> 32);
446 else
447 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
448 pte.pte);
449}
450
451static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
452 pte_t *ptep, pte_t pte)
453{
454 if (sizeof(pteval_t) > sizeof(long))
455 /* 5 arg words */
456 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
457 else
458 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
459}
460
461static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
462{
463 pmdval_t val = native_pmd_val(pmd);
464
465 if (sizeof(pmdval_t) > sizeof(long))
466 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
467 else
468 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
469}
470
471#if CONFIG_PGTABLE_LEVELS >= 3
472static inline pmd_t __pmd(pmdval_t val)
473{
474 pmdval_t ret;
475
476 if (sizeof(pmdval_t) > sizeof(long))
477 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
478 val, (u64)val >> 32);
479 else
480 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
481 val);
482
483 return (pmd_t) { ret };
484}
485
486static inline pmdval_t pmd_val(pmd_t pmd)
487{
488 pmdval_t ret;
489
490 if (sizeof(pmdval_t) > sizeof(long))
491 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
492 pmd.pmd, (u64)pmd.pmd >> 32);
493 else
494 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
495 pmd.pmd);
496
497 return ret;
498}
499
500static inline void set_pud(pud_t *pudp, pud_t pud)
501{
502 pudval_t val = native_pud_val(pud);
503
504 if (sizeof(pudval_t) > sizeof(long))
505 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
506 val, (u64)val >> 32);
507 else
508 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
509 val);
510}
511#if CONFIG_PGTABLE_LEVELS >= 4
512static inline pud_t __pud(pudval_t val)
513{
514 pudval_t ret;
515
516 if (sizeof(pudval_t) > sizeof(long))
517 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
518 val, (u64)val >> 32);
519 else
520 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
521 val);
522
523 return (pud_t) { ret };
524}
525
526static inline pudval_t pud_val(pud_t pud)
527{
528 pudval_t ret;
529
530 if (sizeof(pudval_t) > sizeof(long))
531 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
532 pud.pud, (u64)pud.pud >> 32);
533 else
534 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
535 pud.pud);
536
537 return ret;
538}
539
540static inline void pud_clear(pud_t *pudp)
541{
542 set_pud(pudp, __pud(0));
543}
544
545static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
546{
547 p4dval_t val = native_p4d_val(p4d);
548
549 if (sizeof(p4dval_t) > sizeof(long))
550 PVOP_VCALL3(pv_mmu_ops.set_p4d, p4dp,
551 val, (u64)val >> 32);
552 else
553 PVOP_VCALL2(pv_mmu_ops.set_p4d, p4dp,
554 val);
555}
556
557#if CONFIG_PGTABLE_LEVELS >= 5
558
559static inline p4d_t __p4d(p4dval_t val)
560{
561 p4dval_t ret = PVOP_CALLEE1(p4dval_t, pv_mmu_ops.make_p4d, val);
562
563 return (p4d_t) { ret };
564}
565
566static inline p4dval_t p4d_val(p4d_t p4d)
567{
568 return PVOP_CALLEE1(p4dval_t, pv_mmu_ops.p4d_val, p4d.p4d);
569}
570
571static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
572{
573 pgdval_t val = native_pgd_val(pgd);
574
575 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp, val);
576}
577
578static inline void pgd_clear(pgd_t *pgdp)
579{
580 set_pgd(pgdp, __pgd(0));
581}
582
583#endif /* CONFIG_PGTABLE_LEVELS == 5 */
584
585static inline void p4d_clear(p4d_t *p4dp)
586{
587 set_p4d(p4dp, __p4d(0));
588}
589
590#endif /* CONFIG_PGTABLE_LEVELS == 4 */
591
592#endif /* CONFIG_PGTABLE_LEVELS >= 3 */
593
594#ifdef CONFIG_X86_PAE
595/* Special-case pte-setting operations for PAE, which can't update a
596 64-bit pte atomically */
597static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
598{
599 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
600 pte.pte, pte.pte >> 32);
601}
602
603static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
604 pte_t *ptep)
605{
606 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
607}
608
609static inline void pmd_clear(pmd_t *pmdp)
610{
611 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
612}
613#else /* !CONFIG_X86_PAE */
614static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
615{
616 set_pte(ptep, pte);
617}
618
619static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
620 pte_t *ptep)
621{
622 set_pte_at(mm, addr, ptep, __pte(0));
623}
624
625static inline void pmd_clear(pmd_t *pmdp)
626{
627 set_pmd(pmdp, __pmd(0));
628}
629#endif /* CONFIG_X86_PAE */
630
631#define __HAVE_ARCH_START_CONTEXT_SWITCH
632static inline void arch_start_context_switch(struct task_struct *prev)
633{
634 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
635}
636
637static inline void arch_end_context_switch(struct task_struct *next)
638{
639 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
640}
641
642#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
643static inline void arch_enter_lazy_mmu_mode(void)
644{
645 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
646}
647
648static inline void arch_leave_lazy_mmu_mode(void)
649{
650 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
651}
652
653static inline void arch_flush_lazy_mmu_mode(void)
654{
655 PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
656}
657
658static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
659 phys_addr_t phys, pgprot_t flags)
660{
661 pv_mmu_ops.set_fixmap(idx, phys, flags);
662}
663
664#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
665
666static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
667 u32 val)
668{
669 PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
670}
671
672static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
673{
674 PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
675}
676
677static __always_inline void pv_wait(u8 *ptr, u8 val)
678{
679 PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
680}
681
682static __always_inline void pv_kick(int cpu)
683{
684 PVOP_VCALL1(pv_lock_ops.kick, cpu);
685}
686
687static __always_inline bool pv_vcpu_is_preempted(long cpu)
688{
689 return PVOP_CALLEE1(bool, pv_lock_ops.vcpu_is_preempted, cpu);
690}
691
692#endif /* SMP && PARAVIRT_SPINLOCKS */
693
694#ifdef CONFIG_X86_32
695#define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
696#define PV_RESTORE_REGS "popl %edx; popl %ecx;"
697
698/* save and restore all caller-save registers, except return value */
699#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
700#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
701
702#define PV_FLAGS_ARG "0"
703#define PV_EXTRA_CLOBBERS
704#define PV_VEXTRA_CLOBBERS
705#else
706/* save and restore all caller-save registers, except return value */
707#define PV_SAVE_ALL_CALLER_REGS \
708 "push %rcx;" \
709 "push %rdx;" \
710 "push %rsi;" \
711 "push %rdi;" \
712 "push %r8;" \
713 "push %r9;" \
714 "push %r10;" \
715 "push %r11;"
716#define PV_RESTORE_ALL_CALLER_REGS \
717 "pop %r11;" \
718 "pop %r10;" \
719 "pop %r9;" \
720 "pop %r8;" \
721 "pop %rdi;" \
722 "pop %rsi;" \
723 "pop %rdx;" \
724 "pop %rcx;"
725
726/* We save some registers, but all of them, that's too much. We clobber all
727 * caller saved registers but the argument parameter */
728#define PV_SAVE_REGS "pushq %%rdi;"
729#define PV_RESTORE_REGS "popq %%rdi;"
730#define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
731#define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
732#define PV_FLAGS_ARG "D"
733#endif
734
735/*
736 * Generate a thunk around a function which saves all caller-save
737 * registers except for the return value. This allows C functions to
738 * be called from assembler code where fewer than normal registers are
739 * available. It may also help code generation around calls from C
740 * code if the common case doesn't use many registers.
741 *
742 * When a callee is wrapped in a thunk, the caller can assume that all
743 * arg regs and all scratch registers are preserved across the
744 * call. The return value in rax/eax will not be saved, even for void
745 * functions.
746 */
747#define PV_THUNK_NAME(func) "__raw_callee_save_" #func
748#define PV_CALLEE_SAVE_REGS_THUNK(func) \
749 extern typeof(func) __raw_callee_save_##func; \
750 \
751 asm(".pushsection .text;" \
752 ".globl " PV_THUNK_NAME(func) ";" \
753 ".type " PV_THUNK_NAME(func) ", @function;" \
754 PV_THUNK_NAME(func) ":" \
755 FRAME_BEGIN \
756 PV_SAVE_ALL_CALLER_REGS \
757 "call " #func ";" \
758 PV_RESTORE_ALL_CALLER_REGS \
759 FRAME_END \
760 "ret;" \
761 ".popsection")
762
763/* Get a reference to a callee-save function */
764#define PV_CALLEE_SAVE(func) \
765 ((struct paravirt_callee_save) { __raw_callee_save_##func })
766
767/* Promise that "func" already uses the right calling convention */
768#define __PV_IS_CALLEE_SAVE(func) \
769 ((struct paravirt_callee_save) { func })
770
771static inline notrace unsigned long arch_local_save_flags(void)
772{
773 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
774}
775
776static inline notrace void arch_local_irq_restore(unsigned long f)
777{
778 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
779}
780
781static inline notrace void arch_local_irq_disable(void)
782{
783 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
784}
785
786static inline notrace void arch_local_irq_enable(void)
787{
788 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
789}
790
791static inline notrace unsigned long arch_local_irq_save(void)
792{
793 unsigned long f;
794
795 f = arch_local_save_flags();
796 arch_local_irq_disable();
797 return f;
798}
799
800
801/* Make sure as little as possible of this mess escapes. */
802#undef PARAVIRT_CALL
803#undef __PVOP_CALL
804#undef __PVOP_VCALL
805#undef PVOP_VCALL0
806#undef PVOP_CALL0
807#undef PVOP_VCALL1
808#undef PVOP_CALL1
809#undef PVOP_VCALL2
810#undef PVOP_CALL2
811#undef PVOP_VCALL3
812#undef PVOP_CALL3
813#undef PVOP_VCALL4
814#undef PVOP_CALL4
815
816extern void default_banner(void);
817
818#else /* __ASSEMBLY__ */
819
820#define _PVSITE(ptype, clobbers, ops, word, algn) \
821771:; \
822 ops; \
823772:; \
824 .pushsection .parainstructions,"a"; \
825 .align algn; \
826 word 771b; \
827 .byte ptype; \
828 .byte 772b-771b; \
829 .short clobbers; \
830 .popsection
831
832
833#define COND_PUSH(set, mask, reg) \
834 .if ((~(set)) & mask); push %reg; .endif
835#define COND_POP(set, mask, reg) \
836 .if ((~(set)) & mask); pop %reg; .endif
837
838#ifdef CONFIG_X86_64
839
840#define PV_SAVE_REGS(set) \
841 COND_PUSH(set, CLBR_RAX, rax); \
842 COND_PUSH(set, CLBR_RCX, rcx); \
843 COND_PUSH(set, CLBR_RDX, rdx); \
844 COND_PUSH(set, CLBR_RSI, rsi); \
845 COND_PUSH(set, CLBR_RDI, rdi); \
846 COND_PUSH(set, CLBR_R8, r8); \
847 COND_PUSH(set, CLBR_R9, r9); \
848 COND_PUSH(set, CLBR_R10, r10); \
849 COND_PUSH(set, CLBR_R11, r11)
850#define PV_RESTORE_REGS(set) \
851 COND_POP(set, CLBR_R11, r11); \
852 COND_POP(set, CLBR_R10, r10); \
853 COND_POP(set, CLBR_R9, r9); \
854 COND_POP(set, CLBR_R8, r8); \
855 COND_POP(set, CLBR_RDI, rdi); \
856 COND_POP(set, CLBR_RSI, rsi); \
857 COND_POP(set, CLBR_RDX, rdx); \
858 COND_POP(set, CLBR_RCX, rcx); \
859 COND_POP(set, CLBR_RAX, rax)
860
861#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
862#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
863#define PARA_INDIRECT(addr) *addr(%rip)
864#else
865#define PV_SAVE_REGS(set) \
866 COND_PUSH(set, CLBR_EAX, eax); \
867 COND_PUSH(set, CLBR_EDI, edi); \
868 COND_PUSH(set, CLBR_ECX, ecx); \
869 COND_PUSH(set, CLBR_EDX, edx)
870#define PV_RESTORE_REGS(set) \
871 COND_POP(set, CLBR_EDX, edx); \
872 COND_POP(set, CLBR_ECX, ecx); \
873 COND_POP(set, CLBR_EDI, edi); \
874 COND_POP(set, CLBR_EAX, eax)
875
876#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
877#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
878#define PARA_INDIRECT(addr) *%cs:addr
879#endif
880
881#define INTERRUPT_RETURN \
882 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
883 ANNOTATE_RETPOLINE_SAFE; \
884 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret);)
885
886#define DISABLE_INTERRUPTS(clobbers) \
887 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
888 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
889 ANNOTATE_RETPOLINE_SAFE; \
890 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
891 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
892
893#define ENABLE_INTERRUPTS(clobbers) \
894 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
895 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
896 ANNOTATE_RETPOLINE_SAFE; \
897 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
898 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
899
900#ifdef CONFIG_X86_32
901#define GET_CR0_INTO_EAX \
902 push %ecx; push %edx; \
903 ANNOTATE_RETPOLINE_SAFE; \
904 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
905 pop %edx; pop %ecx
906#else /* !CONFIG_X86_32 */
907
908/*
909 * If swapgs is used while the userspace stack is still current,
910 * there's no way to call a pvop. The PV replacement *must* be
911 * inlined, or the swapgs instruction must be trapped and emulated.
912 */
913#define SWAPGS_UNSAFE_STACK \
914 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
915 swapgs)
916
917/*
918 * Note: swapgs is very special, and in practise is either going to be
919 * implemented with a single "swapgs" instruction or something very
920 * special. Either way, we don't need to save any registers for
921 * it.
922 */
923#define SWAPGS \
924 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
925 ANNOTATE_RETPOLINE_SAFE; \
926 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
927 )
928
929#define GET_CR2_INTO_RAX \
930 ANNOTATE_RETPOLINE_SAFE; \
931 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2);
932
933#define USERGS_SYSRET64 \
934 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
935 CLBR_NONE, \
936 ANNOTATE_RETPOLINE_SAFE; \
937 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64);)
938
939#ifdef CONFIG_DEBUG_ENTRY
940#define SAVE_FLAGS(clobbers) \
941 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_save_fl), clobbers, \
942 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
943 ANNOTATE_RETPOLINE_SAFE; \
944 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_save_fl); \
945 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
946#endif
947
948#endif /* CONFIG_X86_32 */
949
950#endif /* __ASSEMBLY__ */
951#else /* CONFIG_PARAVIRT */
952# define default_banner x86_init_noop
953#ifndef __ASSEMBLY__
954static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
955 struct mm_struct *mm)
956{
957}
958
959static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
960{
961}
962#endif /* __ASSEMBLY__ */
963#endif /* !CONFIG_PARAVIRT */
964#endif /* _ASM_X86_PARAVIRT_H */