tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/* Header of ADC MFD core driver for sunxi platforms
2 *
3 * Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9
10#ifndef __SUN4I_GPADC__H__
11#define __SUN4I_GPADC__H__
12
13#define SUN4I_GPADC_CTRL0 0x00
14
15#define SUN4I_GPADC_CTRL0_ADC_FIRST_DLY(x) ((GENMASK(7, 0) & (x)) << 24)
16#define SUN4I_GPADC_CTRL0_ADC_FIRST_DLY_MODE BIT(23)
17#define SUN4I_GPADC_CTRL0_ADC_CLK_SELECT BIT(22)
18#define SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(x) ((GENMASK(1, 0) & (x)) << 20)
19#define SUN4I_GPADC_CTRL0_FS_DIV(x) ((GENMASK(3, 0) & (x)) << 16)
20#define SUN4I_GPADC_CTRL0_T_ACQ(x) (GENMASK(15, 0) & (x))
21
22#define SUN4I_GPADC_CTRL1 0x04
23
24#define SUN4I_GPADC_CTRL1_STYLUS_UP_DEBOUNCE(x) ((GENMASK(7, 0) & (x)) << 12)
25#define SUN4I_GPADC_CTRL1_STYLUS_UP_DEBOUNCE_EN BIT(9)
26#define SUN4I_GPADC_CTRL1_TOUCH_PAN_CALI_EN BIT(6)
27#define SUN4I_GPADC_CTRL1_TP_DUAL_EN BIT(5)
28#define SUN4I_GPADC_CTRL1_TP_MODE_EN BIT(4)
29#define SUN4I_GPADC_CTRL1_TP_ADC_SELECT BIT(3)
30#define SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(2, 0) & (x))
31#define SUN4I_GPADC_CTRL1_ADC_CHAN_MASK GENMASK(2, 0)
32
33/* TP_CTRL1 bits for sun6i SOCs */
34#define SUN6I_GPADC_CTRL1_TOUCH_PAN_CALI_EN BIT(7)
35#define SUN6I_GPADC_CTRL1_TP_DUAL_EN BIT(6)
36#define SUN6I_GPADC_CTRL1_TP_MODE_EN BIT(5)
37#define SUN6I_GPADC_CTRL1_TP_ADC_SELECT BIT(4)
38#define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x))
39#define SUN6I_GPADC_CTRL1_ADC_CHAN_MASK GENMASK(3, 0)
40
41/* TP_CTRL1 bits for sun8i SoCs */
42#define SUN8I_GPADC_CTRL1_CHOP_TEMP_EN BIT(8)
43#define SUN8I_GPADC_CTRL1_GPADC_CALI_EN BIT(7)
44
45#define SUN4I_GPADC_CTRL2 0x08
46
47#define SUN4I_GPADC_CTRL2_TP_SENSITIVE_ADJUST(x) ((GENMASK(3, 0) & (x)) << 28)
48#define SUN4I_GPADC_CTRL2_TP_MODE_SELECT(x) ((GENMASK(1, 0) & (x)) << 26)
49#define SUN4I_GPADC_CTRL2_PRE_MEA_EN BIT(24)
50#define SUN4I_GPADC_CTRL2_PRE_MEA_THRE_CNT(x) (GENMASK(23, 0) & (x))
51
52#define SUN4I_GPADC_CTRL3 0x0c
53
54#define SUN4I_GPADC_CTRL3_FILTER_EN BIT(2)
55#define SUN4I_GPADC_CTRL3_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
56
57#define SUN4I_GPADC_TPR 0x18
58
59#define SUN4I_GPADC_TPR_TEMP_ENABLE BIT(16)
60#define SUN4I_GPADC_TPR_TEMP_PERIOD(x) (GENMASK(15, 0) & (x))
61
62#define SUN4I_GPADC_INT_FIFOC 0x10
63
64#define SUN4I_GPADC_INT_FIFOC_TEMP_IRQ_EN BIT(18)
65#define SUN4I_GPADC_INT_FIFOC_TP_OVERRUN_IRQ_EN BIT(17)
66#define SUN4I_GPADC_INT_FIFOC_TP_DATA_IRQ_EN BIT(16)
67#define SUN4I_GPADC_INT_FIFOC_TP_DATA_XY_CHANGE BIT(13)
68#define SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(x) ((GENMASK(4, 0) & (x)) << 8)
69#define SUN4I_GPADC_INT_FIFOC_TP_DATA_DRQ_EN BIT(7)
70#define SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH BIT(4)
71#define SUN4I_GPADC_INT_FIFOC_TP_UP_IRQ_EN BIT(1)
72#define SUN4I_GPADC_INT_FIFOC_TP_DOWN_IRQ_EN BIT(0)
73
74#define SUN4I_GPADC_INT_FIFOS 0x14
75
76#define SUN4I_GPADC_INT_FIFOS_TEMP_DATA_PENDING BIT(18)
77#define SUN4I_GPADC_INT_FIFOS_FIFO_OVERRUN_PENDING BIT(17)
78#define SUN4I_GPADC_INT_FIFOS_FIFO_DATA_PENDING BIT(16)
79#define SUN4I_GPADC_INT_FIFOS_TP_IDLE_FLG BIT(2)
80#define SUN4I_GPADC_INT_FIFOS_TP_UP_PENDING BIT(1)
81#define SUN4I_GPADC_INT_FIFOS_TP_DOWN_PENDING BIT(0)
82
83#define SUN4I_GPADC_CDAT 0x1c
84#define SUN4I_GPADC_TEMP_DATA 0x20
85#define SUN4I_GPADC_DATA 0x24
86
87#define SUN4I_GPADC_IRQ_FIFO_DATA 0
88#define SUN4I_GPADC_IRQ_TEMP_DATA 1
89
90/* 10s delay before suspending the IP */
91#define SUN4I_GPADC_AUTOSUSPEND_DELAY 10000
92
93struct sun4i_gpadc_dev {
94 struct device *dev;
95 struct regmap *regmap;
96 struct regmap_irq_chip_data *regmap_irqc;
97 void __iomem *base;
98};
99
100#endif