tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1/*
2 * Copyright (C) 2005, 2006 IBM Corporation
3 * Copyright (C) 2014, 2015 Intel Corporation
4 *
5 * Authors:
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Kylene Hall <kjhall@us.ibm.com>
8 *
9 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10 *
11 * Device driver for TCG/TCPA TPM (trusted platform module).
12 * Specifications at www.trustedcomputinggroup.org
13 *
14 * This device driver implements the TPM interface as defined in
15 * the TCG TPM Interface Spec version 1.2, revision 1.0.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation, version 2 of the
20 * License.
21 */
22
23#ifndef __TPM_TIS_CORE_H__
24#define __TPM_TIS_CORE_H__
25
26#include "tpm.h"
27
28enum tis_access {
29 TPM_ACCESS_VALID = 0x80,
30 TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
31 TPM_ACCESS_REQUEST_PENDING = 0x04,
32 TPM_ACCESS_REQUEST_USE = 0x02,
33};
34
35enum tis_status {
36 TPM_STS_VALID = 0x80,
37 TPM_STS_COMMAND_READY = 0x40,
38 TPM_STS_GO = 0x20,
39 TPM_STS_DATA_AVAIL = 0x10,
40 TPM_STS_DATA_EXPECT = 0x08,
41};
42
43enum tis_int_flags {
44 TPM_GLOBAL_INT_ENABLE = 0x80000000,
45 TPM_INTF_BURST_COUNT_STATIC = 0x100,
46 TPM_INTF_CMD_READY_INT = 0x080,
47 TPM_INTF_INT_EDGE_FALLING = 0x040,
48 TPM_INTF_INT_EDGE_RISING = 0x020,
49 TPM_INTF_INT_LEVEL_LOW = 0x010,
50 TPM_INTF_INT_LEVEL_HIGH = 0x008,
51 TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
52 TPM_INTF_STS_VALID_INT = 0x002,
53 TPM_INTF_DATA_AVAIL_INT = 0x001,
54};
55
56enum tis_defaults {
57 TIS_MEM_LEN = 0x5000,
58 TIS_SHORT_TIMEOUT = 750, /* ms */
59 TIS_LONG_TIMEOUT = 2000, /* 2 sec */
60};
61
62/* Some timeout values are needed before it is known whether the chip is
63 * TPM 1.0 or TPM 2.0.
64 */
65#define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A)
66#define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B)
67#define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C)
68#define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D)
69
70#define TPM_ACCESS(l) (0x0000 | ((l) << 12))
71#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
72#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
73#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
74#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
75#define TPM_STS(l) (0x0018 | ((l) << 12))
76#define TPM_STS3(l) (0x001b | ((l) << 12))
77#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
78
79#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
80#define TPM_RID(l) (0x0F04 | ((l) << 12))
81
82#define LPC_CNTRL_OFFSET 0x84
83#define LPC_CLKRUN_EN (1 << 2)
84#define INTEL_LEGACY_BLK_BASE_ADDR 0xFED08000
85#define ILB_REMAP_SIZE 0x100
86
87enum tpm_tis_flags {
88 TPM_TIS_ITPM_WORKAROUND = BIT(0),
89};
90
91struct tpm_tis_data {
92 u16 manufacturer_id;
93 int locality;
94 int irq;
95 bool irq_tested;
96 unsigned int flags;
97 void __iomem *ilb_base_addr;
98 u16 clkrun_enabled;
99 wait_queue_head_t int_queue;
100 wait_queue_head_t read_queue;
101 const struct tpm_tis_phy_ops *phy_ops;
102};
103
104struct tpm_tis_phy_ops {
105 int (*read_bytes)(struct tpm_tis_data *data, u32 addr, u16 len,
106 u8 *result);
107 int (*write_bytes)(struct tpm_tis_data *data, u32 addr, u16 len,
108 const u8 *value);
109 int (*read16)(struct tpm_tis_data *data, u32 addr, u16 *result);
110 int (*read32)(struct tpm_tis_data *data, u32 addr, u32 *result);
111 int (*write32)(struct tpm_tis_data *data, u32 addr, u32 src);
112};
113
114static inline int tpm_tis_read_bytes(struct tpm_tis_data *data, u32 addr,
115 u16 len, u8 *result)
116{
117 return data->phy_ops->read_bytes(data, addr, len, result);
118}
119
120static inline int tpm_tis_read8(struct tpm_tis_data *data, u32 addr, u8 *result)
121{
122 return data->phy_ops->read_bytes(data, addr, 1, result);
123}
124
125static inline int tpm_tis_read16(struct tpm_tis_data *data, u32 addr,
126 u16 *result)
127{
128 return data->phy_ops->read16(data, addr, result);
129}
130
131static inline int tpm_tis_read32(struct tpm_tis_data *data, u32 addr,
132 u32 *result)
133{
134 return data->phy_ops->read32(data, addr, result);
135}
136
137static inline int tpm_tis_write_bytes(struct tpm_tis_data *data, u32 addr,
138 u16 len, const u8 *value)
139{
140 return data->phy_ops->write_bytes(data, addr, len, value);
141}
142
143static inline int tpm_tis_write8(struct tpm_tis_data *data, u32 addr, u8 value)
144{
145 return data->phy_ops->write_bytes(data, addr, 1, &value);
146}
147
148static inline int tpm_tis_write32(struct tpm_tis_data *data, u32 addr,
149 u32 value)
150{
151 return data->phy_ops->write32(data, addr, value);
152}
153
154static inline bool is_bsw(void)
155{
156#ifdef CONFIG_X86
157 return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
158#else
159 return false;
160#endif
161}
162
163void tpm_tis_remove(struct tpm_chip *chip);
164int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
165 const struct tpm_tis_phy_ops *phy_ops,
166 acpi_handle acpi_dev_handle);
167
168#ifdef CONFIG_PM_SLEEP
169int tpm_tis_resume(struct device *dev);
170#endif
171
172#endif