tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
fork
Configure Feed
Select the types of activity you want to include in your feed.
1#ifndef _ASM_POWERPC_EXCEPTION_H
2#define _ASM_POWERPC_EXCEPTION_H
3/*
4 * Extracted from head_64.S
5 *
6 * PowerPC version
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
15 *
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
18 *
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
21 *
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
26 */
27/*
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
32 *
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
36 */
37#include <asm/head-64.h>
38
39/* PACA save area offsets (exgen, exmc, etc) */
40#define EX_R9 0
41#define EX_R10 8
42#define EX_R11 16
43#define EX_R12 24
44#define EX_R13 32
45#define EX_DAR 40
46#define EX_DSISR 48
47#define EX_CCR 52
48#define EX_CFAR 56
49#define EX_PPR 64
50#if defined(CONFIG_RELOCATABLE)
51#define EX_CTR 72
52#define EX_SIZE 10 /* size in u64 units */
53#else
54#define EX_SIZE 9 /* size in u64 units */
55#endif
56
57/*
58 * maximum recursive depth of MCE exceptions
59 */
60#define MAX_MCE_DEPTH 4
61
62/*
63 * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR
64 * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole
65 * in the save area so it's not necessary to overlap them. Could be used
66 * for future savings though if another 4 byte register was to be saved.
67 */
68#define EX_LR EX_DAR
69
70/*
71 * EX_R3 is only used by the bad_stack handler. bad_stack reloads and
72 * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap
73 * with EX_DAR.
74 */
75#define EX_R3 EX_DAR
76
77/*
78 * Macros for annotating the expected destination of (h)rfid
79 *
80 * The nop instructions allow us to insert one or more instructions to flush the
81 * L1-D cache when returning to userspace or a guest.
82 */
83#define RFI_FLUSH_SLOT \
84 RFI_FLUSH_FIXUP_SECTION; \
85 nop; \
86 nop; \
87 nop
88
89#define RFI_TO_KERNEL \
90 rfid
91
92#define RFI_TO_USER \
93 RFI_FLUSH_SLOT; \
94 rfid; \
95 b rfi_flush_fallback
96
97#define RFI_TO_USER_OR_KERNEL \
98 RFI_FLUSH_SLOT; \
99 rfid; \
100 b rfi_flush_fallback
101
102#define RFI_TO_GUEST \
103 RFI_FLUSH_SLOT; \
104 rfid; \
105 b rfi_flush_fallback
106
107#define HRFI_TO_KERNEL \
108 hrfid
109
110#define HRFI_TO_USER \
111 RFI_FLUSH_SLOT; \
112 hrfid; \
113 b hrfi_flush_fallback
114
115#define HRFI_TO_USER_OR_KERNEL \
116 RFI_FLUSH_SLOT; \
117 hrfid; \
118 b hrfi_flush_fallback
119
120#define HRFI_TO_GUEST \
121 RFI_FLUSH_SLOT; \
122 hrfid; \
123 b hrfi_flush_fallback
124
125#define HRFI_TO_UNKNOWN \
126 RFI_FLUSH_SLOT; \
127 hrfid; \
128 b hrfi_flush_fallback
129
130#ifdef CONFIG_RELOCATABLE
131#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
132 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
133 LOAD_HANDLER(r12,label); \
134 mtctr r12; \
135 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
136 li r10,MSR_RI; \
137 mtmsrd r10,1; /* Set RI (EE=0) */ \
138 bctr;
139#else
140/* If not relocatable, we can jump directly -- and save messing with LR */
141#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
142 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
143 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
144 li r10,MSR_RI; \
145 mtmsrd r10,1; /* Set RI (EE=0) */ \
146 b label;
147#endif
148#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
149 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
150
151/*
152 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
153 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
154 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
155 */
156#define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
157 EXCEPTION_PROLOG_0(area); \
158 EXCEPTION_PROLOG_1(area, extra, vec); \
159 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
160
161/*
162 * We're short on space and time in the exception prolog, so we can't
163 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label.
164 * Instead we get the base of the kernel from paca->kernelbase and or in the low
165 * part of label. This requires that the label be within 64KB of kernelbase, and
166 * that kernelbase be 64K aligned.
167 */
168#define LOAD_HANDLER(reg, label) \
169 ld reg,PACAKBASE(r13); /* get high part of &label */ \
170 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label);
171
172#define __LOAD_HANDLER(reg, label) \
173 ld reg,PACAKBASE(r13); \
174 ori reg,reg,(ABS_ADDR(label))@l;
175
176/*
177 * Branches from unrelocated code (e.g., interrupts) to labels outside
178 * head-y require >64K offsets.
179 */
180#define __LOAD_FAR_HANDLER(reg, label) \
181 ld reg,PACAKBASE(r13); \
182 ori reg,reg,(ABS_ADDR(label))@l; \
183 addis reg,reg,(ABS_ADDR(label))@h;
184
185/* Exception register prefixes */
186#define EXC_HV H
187#define EXC_STD
188
189#if defined(CONFIG_RELOCATABLE)
190/*
191 * If we support interrupts with relocation on AND we're a relocatable kernel,
192 * we need to use CTR to get to the 2nd level handler. So, save/restore it
193 * when required.
194 */
195#define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13)
196#define GET_CTR(reg, area) ld reg,area+EX_CTR(r13)
197#define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg
198#else
199/* ...else CTR is unused and in register. */
200#define SAVE_CTR(reg, area)
201#define GET_CTR(reg, area) mfctr reg
202#define RESTORE_CTR(reg, area)
203#endif
204
205/*
206 * PPR save/restore macros used in exceptions_64s.S
207 * Used for P7 or later processors
208 */
209#define SAVE_PPR(area, ra, rb) \
210BEGIN_FTR_SECTION_NESTED(940) \
211 ld ra,PACACURRENT(r13); \
212 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \
213 std rb,TASKTHREADPPR(ra); \
214END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
215
216#define RESTORE_PPR_PACA(area, ra) \
217BEGIN_FTR_SECTION_NESTED(941) \
218 ld ra,area+EX_PPR(r13); \
219 mtspr SPRN_PPR,ra; \
220END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
221
222/*
223 * Get an SPR into a register if the CPU has the given feature
224 */
225#define OPT_GET_SPR(ra, spr, ftr) \
226BEGIN_FTR_SECTION_NESTED(943) \
227 mfspr ra,spr; \
228END_FTR_SECTION_NESTED(ftr,ftr,943)
229
230/*
231 * Set an SPR from a register if the CPU has the given feature
232 */
233#define OPT_SET_SPR(ra, spr, ftr) \
234BEGIN_FTR_SECTION_NESTED(943) \
235 mtspr spr,ra; \
236END_FTR_SECTION_NESTED(ftr,ftr,943)
237
238/*
239 * Save a register to the PACA if the CPU has the given feature
240 */
241#define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
242BEGIN_FTR_SECTION_NESTED(943) \
243 std ra,offset(r13); \
244END_FTR_SECTION_NESTED(ftr,ftr,943)
245
246#define EXCEPTION_PROLOG_0(area) \
247 GET_PACA(r13); \
248 std r9,area+EX_R9(r13); /* save r9 */ \
249 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
250 HMT_MEDIUM; \
251 std r10,area+EX_R10(r13); /* save r10 - r12 */ \
252 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
253
254#define __EXCEPTION_PROLOG_1_PRE(area) \
255 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
256 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
257 SAVE_CTR(r10, area); \
258 mfcr r9;
259
260#define __EXCEPTION_PROLOG_1_POST(area) \
261 std r11,area+EX_R11(r13); \
262 std r12,area+EX_R12(r13); \
263 GET_SCRATCH0(r10); \
264 std r10,area+EX_R13(r13)
265
266/*
267 * This version of the EXCEPTION_PROLOG_1 will carry
268 * addition parameter called "bitmask" to support
269 * checking of the interrupt maskable level in the SOFTEN_TEST.
270 * Intended to be used in MASKABLE_EXCPETION_* macros.
271 */
272#define MASKABLE_EXCEPTION_PROLOG_1(area, extra, vec, bitmask) \
273 __EXCEPTION_PROLOG_1_PRE(area); \
274 extra(vec, bitmask); \
275 __EXCEPTION_PROLOG_1_POST(area);
276
277/*
278 * This version of the EXCEPTION_PROLOG_1 is intended
279 * to be used in STD_EXCEPTION* macros
280 */
281#define _EXCEPTION_PROLOG_1(area, extra, vec) \
282 __EXCEPTION_PROLOG_1_PRE(area); \
283 extra(vec); \
284 __EXCEPTION_PROLOG_1_POST(area);
285
286#define EXCEPTION_PROLOG_1(area, extra, vec) \
287 _EXCEPTION_PROLOG_1(area, extra, vec)
288
289#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
290 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
291 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
292 LOAD_HANDLER(r12,label) \
293 mtspr SPRN_##h##SRR0,r12; \
294 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
295 mtspr SPRN_##h##SRR1,r10; \
296 h##RFI_TO_KERNEL; \
297 b . /* prevent speculative execution */
298#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
299 __EXCEPTION_PROLOG_PSERIES_1(label, h)
300
301/* _NORI variant keeps MSR_RI clear */
302#define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \
303 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
304 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \
305 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
306 LOAD_HANDLER(r12,label) \
307 mtspr SPRN_##h##SRR0,r12; \
308 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
309 mtspr SPRN_##h##SRR1,r10; \
310 h##RFI_TO_KERNEL; \
311 b . /* prevent speculative execution */
312
313#define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \
314 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h)
315
316#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
317 EXCEPTION_PROLOG_0(area); \
318 EXCEPTION_PROLOG_1(area, extra, vec); \
319 EXCEPTION_PROLOG_PSERIES_1(label, h);
320
321#define __KVMTEST(h, n) \
322 lbz r10,HSTATE_IN_GUEST(r13); \
323 cmpwi r10,0; \
324 bne do_kvm_##h##n
325
326#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
327/*
328 * If hv is possible, interrupts come into to the hv version
329 * of the kvmppc_interrupt code, which then jumps to the PR handler,
330 * kvmppc_interrupt_pr, if the guest is a PR guest.
331 */
332#define kvmppc_interrupt kvmppc_interrupt_hv
333#else
334#define kvmppc_interrupt kvmppc_interrupt_pr
335#endif
336
337/*
338 * Branch to label using its 0xC000 address. This results in instruction
339 * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned
340 * on using mtmsr rather than rfid.
341 *
342 * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than
343 * load KBASE for a slight optimisation.
344 */
345#define BRANCH_TO_C000(reg, label) \
346 __LOAD_HANDLER(reg, label); \
347 mtctr reg; \
348 bctr
349
350#ifdef CONFIG_RELOCATABLE
351#define BRANCH_TO_COMMON(reg, label) \
352 __LOAD_HANDLER(reg, label); \
353 mtctr reg; \
354 bctr
355
356#define BRANCH_LINK_TO_FAR(label) \
357 __LOAD_FAR_HANDLER(r12, label); \
358 mtctr r12; \
359 bctrl
360
361/*
362 * KVM requires __LOAD_FAR_HANDLER.
363 *
364 * __BRANCH_TO_KVM_EXIT branches are also a special case because they
365 * explicitly use r9 then reload it from PACA before branching. Hence
366 * the double-underscore.
367 */
368#define __BRANCH_TO_KVM_EXIT(area, label) \
369 mfctr r9; \
370 std r9,HSTATE_SCRATCH1(r13); \
371 __LOAD_FAR_HANDLER(r9, label); \
372 mtctr r9; \
373 ld r9,area+EX_R9(r13); \
374 bctr
375
376#else
377#define BRANCH_TO_COMMON(reg, label) \
378 b label
379
380#define BRANCH_LINK_TO_FAR(label) \
381 bl label
382
383#define __BRANCH_TO_KVM_EXIT(area, label) \
384 ld r9,area+EX_R9(r13); \
385 b label
386
387#endif
388
389/* Do not enable RI */
390#define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \
391 EXCEPTION_PROLOG_0(area); \
392 EXCEPTION_PROLOG_1(area, extra, vec); \
393 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h);
394
395
396#define __KVM_HANDLER(area, h, n) \
397 BEGIN_FTR_SECTION_NESTED(947) \
398 ld r10,area+EX_CFAR(r13); \
399 std r10,HSTATE_CFAR(r13); \
400 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \
401 BEGIN_FTR_SECTION_NESTED(948) \
402 ld r10,area+EX_PPR(r13); \
403 std r10,HSTATE_PPR(r13); \
404 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
405 ld r10,area+EX_R10(r13); \
406 std r12,HSTATE_SCRATCH0(r13); \
407 sldi r12,r9,32; \
408 ori r12,r12,(n); \
409 /* This reloads r9 before branching to kvmppc_interrupt */ \
410 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt)
411
412#define __KVM_HANDLER_SKIP(area, h, n) \
413 cmpwi r10,KVM_GUEST_MODE_SKIP; \
414 beq 89f; \
415 BEGIN_FTR_SECTION_NESTED(948) \
416 ld r10,area+EX_PPR(r13); \
417 std r10,HSTATE_PPR(r13); \
418 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
419 ld r10,area+EX_R10(r13); \
420 std r12,HSTATE_SCRATCH0(r13); \
421 sldi r12,r9,32; \
422 ori r12,r12,(n); \
423 /* This reloads r9 before branching to kvmppc_interrupt */ \
424 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \
42589: mtocrf 0x80,r9; \
426 ld r9,area+EX_R9(r13); \
427 ld r10,area+EX_R10(r13); \
428 b kvmppc_skip_##h##interrupt
429
430#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
431#define KVMTEST(h, n) __KVMTEST(h, n)
432#define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
433#define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
434
435#else
436#define KVMTEST(h, n)
437#define KVM_HANDLER(area, h, n)
438#define KVM_HANDLER_SKIP(area, h, n)
439#endif
440
441#define NOTEST(n)
442
443#define EXCEPTION_PROLOG_COMMON_1() \
444 std r9,_CCR(r1); /* save CR in stackframe */ \
445 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
446 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
447 std r10,0(r1); /* make stack chain pointer */ \
448 std r0,GPR0(r1); /* save r0 in stackframe */ \
449 std r10,GPR1(r1); /* save r1 in stackframe */ \
450
451
452/*
453 * The common exception prolog is used for all except a few exceptions
454 * such as a segment miss on a kernel address. We have to be prepared
455 * to take another exception from the point where we first touch the
456 * kernel stack onwards.
457 *
458 * On entry r13 points to the paca, r9-r13 are saved in the paca,
459 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
460 * SRR1, and relocation is on.
461 */
462#define EXCEPTION_PROLOG_COMMON(n, area) \
463 andi. r10,r12,MSR_PR; /* See if coming from user */ \
464 mr r10,r1; /* Save r1 */ \
465 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
466 beq- 1f; \
467 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
4681: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \
469 blt+ cr1,3f; /* abort if it is */ \
470 li r1,(n); /* will be reloaded later */ \
471 sth r1,PACA_TRAP_SAVE(r13); \
472 std r3,area+EX_R3(r13); \
473 addi r3,r13,area; /* r3 -> where regs are saved*/ \
474 RESTORE_CTR(r1, area); \
475 b bad_stack; \
4763: EXCEPTION_PROLOG_COMMON_1(); \
477 beq 4f; /* if from kernel mode */ \
478 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \
479 SAVE_PPR(area, r9, r10); \
4804: EXCEPTION_PROLOG_COMMON_2(area) \
481 EXCEPTION_PROLOG_COMMON_3(n) \
482 ACCOUNT_STOLEN_TIME
483
484/* Save original regs values from save area to stack frame. */
485#define EXCEPTION_PROLOG_COMMON_2(area) \
486 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
487 ld r10,area+EX_R10(r13); \
488 std r9,GPR9(r1); \
489 std r10,GPR10(r1); \
490 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
491 ld r10,area+EX_R12(r13); \
492 ld r11,area+EX_R13(r13); \
493 std r9,GPR11(r1); \
494 std r10,GPR12(r1); \
495 std r11,GPR13(r1); \
496 BEGIN_FTR_SECTION_NESTED(66); \
497 ld r10,area+EX_CFAR(r13); \
498 std r10,ORIG_GPR3(r1); \
499 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
500 GET_CTR(r10, area); \
501 std r10,_CTR(r1);
502
503#define EXCEPTION_PROLOG_COMMON_3(n) \
504 std r2,GPR2(r1); /* save r2 in stackframe */ \
505 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
506 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
507 mflr r9; /* Get LR, later save to stack */ \
508 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
509 std r9,_LINK(r1); \
510 lbz r10,PACAIRQSOFTMASK(r13); \
511 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
512 std r10,SOFTE(r1); \
513 std r11,_XER(r1); \
514 li r9,(n)+1; \
515 std r9,_TRAP(r1); /* set trap number */ \
516 li r10,0; \
517 ld r11,exception_marker@toc(r2); \
518 std r10,RESULT(r1); /* clear regs->result */ \
519 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */
520
521/*
522 * Exception vectors.
523 */
524#define STD_EXCEPTION_PSERIES(vec, label) \
525 SET_SCRATCH0(r13); /* save r13 */ \
526 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
527 EXC_STD, KVMTEST_PR, vec); \
528
529/* Version of above for when we have to branch out-of-line */
530#define __OOL_EXCEPTION(vec, label, hdlr) \
531 SET_SCRATCH0(r13) \
532 EXCEPTION_PROLOG_0(PACA_EXGEN) \
533 b hdlr;
534
535#define STD_EXCEPTION_PSERIES_OOL(vec, label) \
536 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
537 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
538
539#define STD_EXCEPTION_HV(loc, vec, label) \
540 SET_SCRATCH0(r13); /* save r13 */ \
541 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
542 EXC_HV, KVMTEST_HV, vec);
543
544#define STD_EXCEPTION_HV_OOL(vec, label) \
545 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
546 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
547
548#define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
549 /* No guest interrupts come through here */ \
550 SET_SCRATCH0(r13); /* save r13 */ \
551 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec);
552
553#define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
554 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
555 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD)
556
557#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
558 SET_SCRATCH0(r13); /* save r13 */ \
559 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \
560 EXC_HV, KVMTEST_HV, vec);
561
562#define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
563 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
564 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
565
566/* This associate vector numbers with bits in paca->irq_happened */
567#define SOFTEN_VALUE_0x500 PACA_IRQ_EE
568#define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
569#define SOFTEN_VALUE_0x980 PACA_IRQ_DEC
570#define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
571#define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
572#define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI
573#define SOFTEN_VALUE_0xea0 PACA_IRQ_EE
574#define SOFTEN_VALUE_0xf00 PACA_IRQ_PMI
575
576#define __SOFTEN_TEST(h, vec, bitmask) \
577 lbz r10,PACAIRQSOFTMASK(r13); \
578 andi. r10,r10,bitmask; \
579 li r10,SOFTEN_VALUE_##vec; \
580 bne masked_##h##interrupt
581
582#define _SOFTEN_TEST(h, vec, bitmask) __SOFTEN_TEST(h, vec, bitmask)
583
584#define SOFTEN_TEST_PR(vec, bitmask) \
585 KVMTEST(EXC_STD, vec); \
586 _SOFTEN_TEST(EXC_STD, vec, bitmask)
587
588#define SOFTEN_TEST_HV(vec, bitmask) \
589 KVMTEST(EXC_HV, vec); \
590 _SOFTEN_TEST(EXC_HV, vec, bitmask)
591
592#define KVMTEST_PR(vec) \
593 KVMTEST(EXC_STD, vec)
594
595#define KVMTEST_HV(vec) \
596 KVMTEST(EXC_HV, vec)
597
598#define SOFTEN_NOTEST_PR(vec, bitmask) _SOFTEN_TEST(EXC_STD, vec, bitmask)
599#define SOFTEN_NOTEST_HV(vec, bitmask) _SOFTEN_TEST(EXC_HV, vec, bitmask)
600
601#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \
602 SET_SCRATCH0(r13); /* save r13 */ \
603 EXCEPTION_PROLOG_0(PACA_EXGEN); \
604 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \
605 EXCEPTION_PROLOG_PSERIES_1(label, h);
606
607#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \
608 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra, bitmask)
609
610#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label, bitmask) \
611 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
612 EXC_STD, SOFTEN_TEST_PR, bitmask)
613
614#define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label, bitmask) \
615 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\
616 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
617
618#define MASKABLE_EXCEPTION_HV(loc, vec, label, bitmask) \
619 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
620 EXC_HV, SOFTEN_TEST_HV, bitmask)
621
622#define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask) \
623 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
624 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
625
626#define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask) \
627 SET_SCRATCH0(r13); /* save r13 */ \
628 EXCEPTION_PROLOG_0(PACA_EXGEN); \
629 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask); \
630 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
631
632#define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask)\
633 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra, bitmask)
634
635#define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label, bitmask) \
636 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
637 EXC_STD, SOFTEN_NOTEST_PR, bitmask)
638
639#define MASKABLE_RELON_EXCEPTION_PSERIES_OOL(vec, label, bitmask) \
640 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\
641 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD);
642
643#define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label, bitmask) \
644 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
645 EXC_HV, SOFTEN_TEST_HV, bitmask)
646
647#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask) \
648 MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
649 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
650
651/*
652 * Our exception common code can be passed various "additions"
653 * to specify the behaviour of interrupts, whether to kick the
654 * runlatch, etc...
655 */
656
657/*
658 * This addition reconciles our actual IRQ state with the various software
659 * flags that track it. This may call C code.
660 */
661#define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11)
662
663#define ADD_NVGPRS \
664 bl save_nvgprs
665
666#define RUNLATCH_ON \
667BEGIN_FTR_SECTION \
668 CURRENT_THREAD_INFO(r3, r1); \
669 ld r4,TI_LOCAL_FLAGS(r3); \
670 andi. r0,r4,_TLF_RUNLATCH; \
671 beql ppc64_runlatch_on_trampoline; \
672END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
673
674#define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \
675 EXCEPTION_PROLOG_COMMON(trap, area); \
676 /* Volatile regs are potentially clobbered here */ \
677 additions; \
678 addi r3,r1,STACK_FRAME_OVERHEAD; \
679 bl hdlr; \
680 b ret
681
682/*
683 * Exception where stack is already set in r1, r1 is saved in r10, and it
684 * continues rather than returns.
685 */
686#define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \
687 EXCEPTION_PROLOG_COMMON_1(); \
688 EXCEPTION_PROLOG_COMMON_2(area); \
689 EXCEPTION_PROLOG_COMMON_3(trap); \
690 /* Volatile regs are potentially clobbered here */ \
691 additions; \
692 addi r3,r1,STACK_FRAME_OVERHEAD; \
693 bl hdlr
694
695#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
696 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \
697 ret_from_except, ADD_NVGPRS;ADD_RECONCILE)
698
699/*
700 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
701 * in the idle task and therefore need the special idle handling
702 * (finish nap and runlatch)
703 */
704#define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
705 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \
706 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON)
707
708/*
709 * When the idle code in power4_idle puts the CPU into NAP mode,
710 * it has to do so in a loop, and relies on the external interrupt
711 * and decrementer interrupt entry code to get it out of the loop.
712 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
713 * to signal that it is in the loop and needs help to get out.
714 */
715#ifdef CONFIG_PPC_970_NAP
716#define FINISH_NAP \
717BEGIN_FTR_SECTION \
718 CURRENT_THREAD_INFO(r11, r1); \
719 ld r9,TI_LOCAL_FLAGS(r11); \
720 andi. r10,r9,_TLF_NAPPING; \
721 bnel power4_fixup_nap; \
722END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
723#else
724#define FINISH_NAP
725#endif
726
727#endif /* _ASM_POWERPC_EXCEPTION_H */