tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: GPL-2.0
2menu "Platform support"
3
4source "arch/powerpc/platforms/powernv/Kconfig"
5source "arch/powerpc/platforms/pseries/Kconfig"
6source "arch/powerpc/platforms/chrp/Kconfig"
7source "arch/powerpc/platforms/512x/Kconfig"
8source "arch/powerpc/platforms/52xx/Kconfig"
9source "arch/powerpc/platforms/powermac/Kconfig"
10source "arch/powerpc/platforms/maple/Kconfig"
11source "arch/powerpc/platforms/pasemi/Kconfig"
12source "arch/powerpc/platforms/ps3/Kconfig"
13source "arch/powerpc/platforms/cell/Kconfig"
14source "arch/powerpc/platforms/8xx/Kconfig"
15source "arch/powerpc/platforms/82xx/Kconfig"
16source "arch/powerpc/platforms/83xx/Kconfig"
17source "arch/powerpc/platforms/85xx/Kconfig"
18source "arch/powerpc/platforms/86xx/Kconfig"
19source "arch/powerpc/platforms/embedded6xx/Kconfig"
20source "arch/powerpc/platforms/44x/Kconfig"
21source "arch/powerpc/platforms/40x/Kconfig"
22source "arch/powerpc/platforms/amigaone/Kconfig"
23
24config KVM_GUEST
25 bool "KVM Guest support"
26 default n
27 select EPAPR_PARAVIRT
28 ---help---
29 This option enables various optimizations for running under the KVM
30 hypervisor. Overhead for the kernel when not running inside KVM should
31 be minimal.
32
33 In case of doubt, say Y
34
35config EPAPR_PARAVIRT
36 bool "ePAPR para-virtualization support"
37 default n
38 help
39 Enables ePAPR para-virtualization support for guests.
40
41 In case of doubt, say Y
42
43config PPC_NATIVE
44 bool
45 depends on 6xx || PPC64
46 help
47 Support for running natively on the hardware, i.e. without
48 a hypervisor. This option is not user-selectable but should
49 be selected by all platforms that need it.
50
51config PPC_OF_BOOT_TRAMPOLINE
52 bool "Support booting from Open Firmware or yaboot"
53 depends on 6xx || PPC64
54 default y
55 help
56 Support from booting from Open Firmware or yaboot using an
57 Open Firmware client interface. This enables the kernel to
58 communicate with open firmware to retrieve system information
59 such as the device tree.
60
61 In case of doubt, say Y
62
63config PPC_DT_CPU_FTRS
64 bool "Device-tree based CPU feature discovery & setup"
65 depends on PPC_BOOK3S_64
66 default y
67 help
68 This enables code to use a new device tree binding for describing CPU
69 compatibility and features. Saying Y here will attempt to use the new
70 binding if the firmware provides it. Currently only the skiboot
71 firmware provides this binding.
72 If you're not sure say Y.
73
74config UDBG_RTAS_CONSOLE
75 bool "RTAS based debug console"
76 depends on PPC_RTAS
77 default n
78
79config PPC_SMP_MUXED_IPI
80 bool
81 help
82 Select this option if your platform supports SMP and your
83 interrupt controller provides less than 4 interrupts to each
84 cpu. This will enable the generic code to multiplex the 4
85 messages on to one ipi.
86
87config IPIC
88 bool
89 default n
90
91config MPIC
92 bool
93 default n
94
95config MPIC_TIMER
96 bool "MPIC Global Timer"
97 depends on MPIC && FSL_SOC
98 default n
99 help
100 The MPIC global timer is a hardware timer inside the
101 Freescale PIC complying with OpenPIC standard. When the
102 specified interval times out, the hardware timer generates
103 an interrupt. The driver currently is only tested on fsl
104 chip, but it can potentially support other global timers
105 complying with the OpenPIC standard.
106
107config FSL_MPIC_TIMER_WAKEUP
108 tristate "Freescale MPIC global timer wakeup driver"
109 depends on FSL_SOC && MPIC_TIMER && PM
110 default n
111 help
112 The driver provides a way to wake up the system by MPIC
113 timer.
114 e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
115
116config PPC_EPAPR_HV_PIC
117 bool
118 default n
119 select EPAPR_PARAVIRT
120
121config MPIC_WEIRD
122 bool
123 default n
124
125config MPIC_MSGR
126 bool "MPIC message register support"
127 depends on MPIC
128 default n
129 help
130 Enables support for the MPIC message registers. These
131 registers are used for inter-processor communication.
132
133config PPC_I8259
134 bool
135 default n
136
137config U3_DART
138 bool
139 depends on PPC64
140 default n
141
142config PPC_RTAS
143 bool
144 default n
145
146config RTAS_ERROR_LOGGING
147 bool
148 depends on PPC_RTAS
149 default n
150
151config PPC_RTAS_DAEMON
152 bool
153 depends on PPC_RTAS
154 default n
155
156config RTAS_PROC
157 bool "Proc interface to RTAS"
158 depends on PPC_RTAS && PROC_FS
159 default y
160
161config RTAS_FLASH
162 tristate "Firmware flash interface"
163 depends on PPC64 && RTAS_PROC
164
165config MMIO_NVRAM
166 bool
167 default n
168
169config MPIC_U3_HT_IRQS
170 bool
171 default n
172
173config MPIC_BROKEN_REGREAD
174 bool
175 depends on MPIC
176 help
177 This option enables a MPIC driver workaround for some chips
178 that have a bug that causes some interrupt source information
179 to not read back properly. It is safe to use on other chips as
180 well, but enabling it uses about 8KB of memory to keep copies
181 of the register contents in software.
182
183config EEH
184 bool
185 depends on (PPC_POWERNV || PPC_PSERIES) && PCI
186 default y
187
188config PPC_MPC106
189 bool
190 default n
191
192config PPC_970_NAP
193 bool
194 default n
195
196config PPC_P7_NAP
197 bool
198 default n
199
200config PPC_INDIRECT_PIO
201 bool
202 select GENERIC_IOMAP
203
204config PPC_INDIRECT_MMIO
205 bool
206
207config PPC_IO_WORKAROUNDS
208 bool
209
210source "drivers/cpufreq/Kconfig"
211
212menu "CPUIdle driver"
213
214source "drivers/cpuidle/Kconfig"
215
216endmenu
217
218config PPC601_SYNC_FIX
219 bool "Workarounds for PPC601 bugs"
220 depends on 6xx && PPC_PMAC
221 help
222 Some versions of the PPC601 (the first PowerPC chip) have bugs which
223 mean that extra synchronization instructions are required near
224 certain instructions, typically those that make major changes to the
225 CPU state. These extra instructions reduce performance slightly.
226 If you say N here, these extra instructions will not be included,
227 resulting in a kernel which will run faster but may not run at all
228 on some systems with the PPC601 chip.
229
230 If in doubt, say Y here.
231
232config TAU
233 bool "On-chip CPU temperature sensor support"
234 depends on 6xx
235 help
236 G3 and G4 processors have an on-chip temperature sensor called the
237 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
238 temperature within 2-4 degrees Celsius. This option shows the current
239 on-die temperature in /proc/cpuinfo if the cpu supports it.
240
241 Unfortunately, on some chip revisions, this sensor is very inaccurate
242 and in many cases, does not work at all, so don't assume the cpu
243 temp is actually what /proc/cpuinfo says it is.
244
245config TAU_INT
246 bool "Interrupt driven TAU driver (DANGEROUS)"
247 depends on TAU
248 ---help---
249 The TAU supports an interrupt driven mode which causes an interrupt
250 whenever the temperature goes out of range. This is the fastest way
251 to get notified the temp has exceeded a range. With this option off,
252 a timer is used to re-check the temperature periodically.
253
254 However, on some cpus it appears that the TAU interrupt hardware
255 is buggy and can cause a situation which would lead unexplained hard
256 lockups.
257
258 Unless you are extending the TAU driver, or enjoy kernel/hardware
259 debugging, leave this option off.
260
261config TAU_AVERAGE
262 bool "Average high and low temp"
263 depends on TAU
264 ---help---
265 The TAU hardware can compare the temperature to an upper and lower
266 bound. The default behavior is to show both the upper and lower
267 bound in /proc/cpuinfo. If the range is large, the temperature is
268 either changing a lot, or the TAU hardware is broken (likely on some
269 G4's). If the range is small (around 4 degrees), the temperature is
270 relatively stable. If you say Y here, a single temperature value,
271 halfway between the upper and lower bounds, will be reported in
272 /proc/cpuinfo.
273
274 If in doubt, say N here.
275
276config QE_GPIO
277 bool "QE GPIO support"
278 depends on QUICC_ENGINE
279 select GPIOLIB
280 help
281 Say Y here if you're going to use hardware that connects to the
282 QE GPIOs.
283
284config CPM2
285 bool "Enable support for the CPM2 (Communications Processor Module)"
286 depends on (FSL_SOC_BOOKE && PPC32) || 8260
287 select CPM
288 select PPC_PCI_CHOICE
289 select GPIOLIB
290 help
291 The CPM2 (Communications Processor Module) is a coprocessor on
292 embedded CPUs made by Freescale. Selecting this option means that
293 you wish to build a kernel for a machine with a CPM2 coprocessor
294 on it (826x, 827x, 8560).
295
296config AXON_RAM
297 tristate "Axon DDR2 memory device driver"
298 depends on PPC_IBM_CELL_BLADE && BLOCK
299 select DAX
300 default m
301 help
302 It registers one block device per Axon's DDR2 memory bank found
303 on a system. Block devices are called axonram?, their major and
304 minor numbers are available in /proc/devices, /proc/partitions or
305 in /sys/block/axonram?/dev.
306
307config FSL_ULI1575
308 bool
309 default n
310 select GENERIC_ISA_DMA
311 help
312 Supports for the ULI1575 PCIe south bridge that exists on some
313 Freescale reference boards. The boards all use the ULI in pretty
314 much the same way.
315
316config CPM
317 bool
318 select GENERIC_ALLOCATOR
319
320config OF_RTC
321 bool
322 help
323 Uses information from the OF or flattened device tree to instantiate
324 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
325
326config GEN_RTC
327 bool "Use the platform RTC operations from user space"
328 select RTC_CLASS
329 select RTC_DRV_GENERIC
330 help
331 This option provides backwards compatibility with the old gen_rtc.ko
332 module that was traditionally used for old PowerPC machines.
333 Platforms should migrate to enabling the RTC_DRV_GENERIC by hand
334 replacing their get_rtc_time/set_rtc_time callbacks with
335 a proper RTC device driver.
336
337config SIMPLE_GPIO
338 bool "Support for simple, memory-mapped GPIO controllers"
339 depends on PPC
340 select GPIOLIB
341 help
342 Say Y here to support simple, memory-mapped GPIO controllers.
343 These are usually BCSRs used to control board's switches, LEDs,
344 chip-selects, Ethernet/USB PHY's power and various other small
345 on-board peripherals.
346
347config MCU_MPC8349EMITX
348 bool "MPC8349E-mITX MCU driver"
349 depends on I2C=y && PPC_83xx
350 select GPIOLIB
351 help
352 Say Y here to enable soft power-off functionality on the Freescale
353 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
354 also register MCU GPIOs with the generic GPIO API, so you'll able
355 to use MCU pins as GPIOs.
356
357config XILINX_PCI
358 bool "Xilinx PCI host bridge support"
359 depends on PCI && XILINX_VIRTEX
360
361endmenu