Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Device Tree Source for the Alt board
3 *
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12#include "r8a7794.dtsi"
13#include <dt-bindings/gpio/gpio.h>
14
15/ {
16 model = "Alt";
17 compatible = "renesas,alt", "renesas,r8a7794";
18
19 aliases {
20 serial0 = &scif2;
21 i2c10 = &gpioi2c4;
22 i2c12 = &i2cexio4;
23 };
24
25 chosen {
26 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
27 stdout-path = "serial0:115200n8";
28 };
29
30 memory@40000000 {
31 device_type = "memory";
32 reg = <0 0x40000000 0 0x40000000>;
33 };
34
35 d3_3v: regulator-d3-3v {
36 compatible = "regulator-fixed";
37 regulator-name = "D3.3V";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-boot-on;
41 regulator-always-on;
42 };
43
44 vcc_sdhi0: regulator-vcc-sdhi0 {
45 compatible = "regulator-fixed";
46
47 regulator-name = "SDHI0 Vcc";
48 regulator-min-microvolt = <3300000>;
49 regulator-max-microvolt = <3300000>;
50
51 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
52 enable-active-high;
53 };
54
55 vccq_sdhi0: regulator-vccq-sdhi0 {
56 compatible = "regulator-gpio";
57
58 regulator-name = "SDHI0 VccQ";
59 regulator-min-microvolt = <1800000>;
60 regulator-max-microvolt = <3300000>;
61
62 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
63 gpios-states = <1>;
64 states = <3300000 1
65 1800000 0>;
66 };
67
68 vcc_sdhi1: regulator-vcc-sdhi1 {
69 compatible = "regulator-fixed";
70
71 regulator-name = "SDHI1 Vcc";
72 regulator-min-microvolt = <3300000>;
73 regulator-max-microvolt = <3300000>;
74
75 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
76 enable-active-high;
77 };
78
79 vccq_sdhi1: regulator-vccq-sdhi1 {
80 compatible = "regulator-gpio";
81
82 regulator-name = "SDHI1 VccQ";
83 regulator-min-microvolt = <1800000>;
84 regulator-max-microvolt = <3300000>;
85
86 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
87 gpios-states = <1>;
88 states = <3300000 1
89 1800000 0>;
90 };
91
92 lbsc {
93 #address-cells = <1>;
94 #size-cells = <1>;
95 };
96
97 vga-encoder {
98 compatible = "adi,adv7123";
99
100 ports {
101 #address-cells = <1>;
102 #size-cells = <0>;
103
104 port@0 {
105 reg = <0>;
106 adv7123_in: endpoint {
107 remote-endpoint = <&du_out_rgb1>;
108 };
109 };
110 port@1 {
111 reg = <1>;
112 adv7123_out: endpoint {
113 remote-endpoint = <&vga_in>;
114 };
115 };
116 };
117 };
118
119 vga {
120 compatible = "vga-connector";
121
122 port {
123 vga_in: endpoint {
124 remote-endpoint = <&adv7123_out>;
125 };
126 };
127 };
128
129 x2_clk: x2-clock {
130 compatible = "fixed-clock";
131 #clock-cells = <0>;
132 clock-frequency = <74250000>;
133 };
134
135 x13_clk: x13-clock {
136 compatible = "fixed-clock";
137 #clock-cells = <0>;
138 clock-frequency = <148500000>;
139 };
140
141 gpioi2c4: i2c-10 {
142 #address-cells = <1>;
143 #size-cells = <0>;
144 compatible = "i2c-gpio";
145 status = "disabled";
146 gpios = <&gpio4 9 GPIO_ACTIVE_HIGH /* sda */
147 &gpio4 8 GPIO_ACTIVE_HIGH /* scl */
148 >;
149 i2c-gpio,delay-us = <5>;
150 };
151
152 /*
153 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
154 * A fallback to GPIO is provided.
155 */
156 i2cexio4: i2c-14 {
157 compatible = "i2c-demux-pinctrl";
158 i2c-parent = <&i2c4>, <&gpioi2c4>;
159 i2c-bus-name = "i2c-exio4";
160 #address-cells = <1>;
161 #size-cells = <0>;
162 };
163};
164
165&du {
166 pinctrl-0 = <&du_pins>;
167 pinctrl-names = "default";
168 status = "okay";
169
170 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
171 <&x13_clk>, <&x2_clk>;
172 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
173
174 ports {
175 port@1 {
176 endpoint {
177 remote-endpoint = <&adv7123_in>;
178 };
179 };
180 };
181};
182
183&extal_clk {
184 clock-frequency = <20000000>;
185};
186
187&pfc {
188 pinctrl-0 = <&scif_clk_pins>;
189 pinctrl-names = "default";
190
191 du_pins: du {
192 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
193 function = "du1";
194 };
195
196 scif2_pins: scif2 {
197 groups = "scif2_data";
198 function = "scif2";
199 };
200
201 scif_clk_pins: scif_clk {
202 groups = "scif_clk";
203 function = "scif_clk";
204 };
205
206 ether_pins: ether {
207 groups = "eth_link", "eth_mdio", "eth_rmii";
208 function = "eth";
209 };
210
211 phy1_pins: phy1 {
212 groups = "intc_irq8";
213 function = "intc";
214 };
215
216 i2c1_pins: i2c1 {
217 groups = "i2c1";
218 function = "i2c1";
219 };
220
221 i2c4_pins: i2c4 {
222 groups = "i2c4";
223 function = "i2c4";
224 };
225
226 vin0_pins: vin0 {
227 groups = "vin0_data8", "vin0_clk";
228 function = "vin0";
229 };
230
231 mmcif0_pins: mmcif0 {
232 groups = "mmc_data8", "mmc_ctrl";
233 function = "mmc";
234 };
235
236 sdhi0_pins: sd0 {
237 groups = "sdhi0_data4", "sdhi0_ctrl";
238 function = "sdhi0";
239 power-source = <3300>;
240 };
241
242 sdhi0_pins_uhs: sd0_uhs {
243 groups = "sdhi0_data4", "sdhi0_ctrl";
244 function = "sdhi0";
245 power-source = <1800>;
246 };
247
248 sdhi1_pins: sd1 {
249 groups = "sdhi1_data4", "sdhi1_ctrl";
250 function = "sdhi1";
251 power-source = <3300>;
252 };
253
254 sdhi1_pins_uhs: sd1_uhs {
255 groups = "sdhi1_data4", "sdhi1_ctrl";
256 function = "sdhi1";
257 power-source = <1800>;
258 };
259};
260
261&cmt0 {
262 status = "okay";
263};
264
265&pfc {
266 qspi_pins: qspi {
267 groups = "qspi_ctrl", "qspi_data4";
268 function = "qspi";
269 };
270};
271
272ðer {
273 pinctrl-0 = <ðer_pins &phy1_pins>;
274 pinctrl-names = "default";
275
276 phy-handle = <&phy1>;
277 renesas,ether-link-active-low;
278 status = "okay";
279
280 phy1: ethernet-phy@1 {
281 reg = <1>;
282 interrupt-parent = <&irqc0>;
283 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
284 micrel,led-mode = <1>;
285 };
286};
287
288&mmcif0 {
289 pinctrl-0 = <&mmcif0_pins>;
290 pinctrl-names = "default";
291
292 vmmc-supply = <&d3_3v>;
293 vqmmc-supply = <&d3_3v>;
294 bus-width = <8>;
295 non-removable;
296 status = "okay";
297};
298
299&sdhi0 {
300 pinctrl-0 = <&sdhi0_pins>;
301 pinctrl-1 = <&sdhi0_pins_uhs>;
302 pinctrl-names = "default", "state_uhs";
303
304 vmmc-supply = <&vcc_sdhi0>;
305 vqmmc-supply = <&vccq_sdhi0>;
306 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
307 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
308 sd-uhs-sdr50;
309 sd-uhs-sdr104;
310 status = "okay";
311};
312
313&sdhi1 {
314 pinctrl-0 = <&sdhi1_pins>;
315 pinctrl-1 = <&sdhi1_pins_uhs>;
316 pinctrl-names = "default", "state_uhs";
317
318 vmmc-supply = <&vcc_sdhi1>;
319 vqmmc-supply = <&vccq_sdhi1>;
320 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
321 wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
322 sd-uhs-sdr50;
323 status = "okay";
324};
325
326&i2c1 {
327 pinctrl-0 = <&i2c1_pins>;
328 pinctrl-names = "default";
329
330 status = "okay";
331 clock-frequency = <400000>;
332
333 composite-in@20 {
334 compatible = "adi,adv7180";
335 reg = <0x20>;
336 remote = <&vin0>;
337
338 port {
339 adv7180: endpoint {
340 bus-width = <8>;
341 remote-endpoint = <&vin0ep>;
342 };
343 };
344 };
345};
346
347&i2c4 {
348 pinctrl-0 = <&i2c4_pins>;
349 pinctrl-names = "i2c-exio4";
350};
351
352&vin0 {
353 status = "okay";
354 pinctrl-0 = <&vin0_pins>;
355 pinctrl-names = "default";
356
357 port {
358 #address-cells = <1>;
359 #size-cells = <0>;
360
361 vin0ep: endpoint {
362 remote-endpoint = <&adv7180>;
363 bus-width = <8>;
364 };
365 };
366};
367
368&scif2 {
369 pinctrl-0 = <&scif2_pins>;
370 pinctrl-names = "default";
371
372 status = "okay";
373};
374
375&scif_clk {
376 clock-frequency = <14745600>;
377};
378
379&qspi {
380 pinctrl-0 = <&qspi_pins>;
381 pinctrl-names = "default";
382
383 status = "okay";
384
385 flash@0 {
386 compatible = "spansion,s25fl512s", "jedec,spi-nor";
387 reg = <0>;
388 spi-max-frequency = <30000000>;
389 spi-tx-bus-width = <4>;
390 spi-rx-bus-width = <4>;
391 spi-cpol;
392 spi-cpha;
393 m25p,fast-read;
394
395 partitions {
396 compatible = "fixed-partitions";
397 #address-cells = <1>;
398 #size-cells = <1>;
399
400 partition@0 {
401 label = "loader";
402 reg = <0x00000000 0x00040000>;
403 read-only;
404 };
405 partition@40000 {
406 label = "system";
407 reg = <0x00040000 0x00040000>;
408 read-only;
409 };
410 partition@80000 {
411 label = "user";
412 reg = <0x00080000 0x03f80000>;
413 };
414 };
415 };
416};