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1/* 2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 */ 9 10#ifndef __ASM_IRQFLAGS_ARCOMPACT_H 11#define __ASM_IRQFLAGS_ARCOMPACT_H 12 13/* vineetg: March 2010 : local_irq_save( ) optimisation 14 * -Remove explicit mov of current status32 into reg, that is not needed 15 * -Use BIC insn instead of INVERTED + AND 16 * -Conditionally disable interrupts (if they are not enabled, don't disable) 17*/ 18 19#include <asm/arcregs.h> 20 21/* status32 Reg bits related to Interrupt Handling */ 22#define STATUS_E1_BIT 1 /* Int 1 enable */ 23#define STATUS_E2_BIT 2 /* Int 2 enable */ 24#define STATUS_A1_BIT 3 /* Int 1 active */ 25#define STATUS_A2_BIT 4 /* Int 2 active */ 26#define STATUS_AE_BIT 5 /* Exception active */ 27 28#define STATUS_E1_MASK (1<<STATUS_E1_BIT) 29#define STATUS_E2_MASK (1<<STATUS_E2_BIT) 30#define STATUS_A1_MASK (1<<STATUS_A1_BIT) 31#define STATUS_A2_MASK (1<<STATUS_A2_BIT) 32#define STATUS_AE_MASK (1<<STATUS_AE_BIT) 33#define STATUS_IE_MASK (STATUS_E1_MASK | STATUS_E2_MASK) 34 35/* Other Interrupt Handling related Aux regs */ 36#define AUX_IRQ_LEV 0x200 /* IRQ Priority: L1 or L2 */ 37#define AUX_IRQ_HINT 0x201 /* For generating Soft Interrupts */ 38#define AUX_IRQ_LV12 0x43 /* interrupt level register */ 39 40#define AUX_IENABLE 0x40c 41#define AUX_ITRIGGER 0x40d 42#define AUX_IPULSE 0x415 43 44#define ISA_INIT_STATUS_BITS STATUS_IE_MASK 45 46#ifndef __ASSEMBLY__ 47 48/****************************************************************** 49 * IRQ Control Macros 50 * 51 * All of them have "memory" clobber (compiler barrier) which is needed to 52 * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available) 53 * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register) 54 * 55 * Noted at the time of Abilis Timer List corruption 56 * Orig Bug + Rejected solution : https://lkml.org/lkml/2013/3/29/67 57 * Reasoning : https://lkml.org/lkml/2013/4/8/15 58 * 59 ******************************************************************/ 60 61/* 62 * Save IRQ state and disable IRQs 63 */ 64static inline long arch_local_irq_save(void) 65{ 66 unsigned long temp, flags; 67 68 __asm__ __volatile__( 69 " lr %1, [status32] \n" 70 " bic %0, %1, %2 \n" 71 " and.f 0, %1, %2 \n" 72 " flag.nz %0 \n" 73 : "=r"(temp), "=r"(flags) 74 : "n"((STATUS_E1_MASK | STATUS_E2_MASK)) 75 : "memory", "cc"); 76 77 return flags; 78} 79 80/* 81 * restore saved IRQ state 82 */ 83static inline void arch_local_irq_restore(unsigned long flags) 84{ 85 86 __asm__ __volatile__( 87 " flag %0 \n" 88 : 89 : "r"(flags) 90 : "memory"); 91} 92 93/* 94 * Unconditionally Enable IRQs 95 */ 96static inline void arch_local_irq_enable(void) 97{ 98 unsigned long temp; 99 100 __asm__ __volatile__( 101 " lr %0, [status32] \n" 102 " or %0, %0, %1 \n" 103 " flag %0 \n" 104 : "=&r"(temp) 105 : "n"((STATUS_E1_MASK | STATUS_E2_MASK)) 106 : "cc", "memory"); 107} 108 109 110/* 111 * Unconditionally Disable IRQs 112 */ 113static inline void arch_local_irq_disable(void) 114{ 115 unsigned long temp; 116 117 __asm__ __volatile__( 118 " lr %0, [status32] \n" 119 " and %0, %0, %1 \n" 120 " flag %0 \n" 121 : "=&r"(temp) 122 : "n"(~(STATUS_E1_MASK | STATUS_E2_MASK)) 123 : "memory"); 124} 125 126/* 127 * save IRQ state 128 */ 129static inline long arch_local_save_flags(void) 130{ 131 unsigned long temp; 132 133 __asm__ __volatile__( 134 " lr %0, [status32] \n" 135 : "=&r"(temp) 136 : 137 : "memory"); 138 139 return temp; 140} 141 142/* 143 * Query IRQ state 144 */ 145static inline int arch_irqs_disabled_flags(unsigned long flags) 146{ 147 return !(flags & (STATUS_E1_MASK 148#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS 149 | STATUS_E2_MASK 150#endif 151 )); 152} 153 154static inline int arch_irqs_disabled(void) 155{ 156 return arch_irqs_disabled_flags(arch_local_save_flags()); 157} 158 159#else 160 161#ifdef CONFIG_TRACE_IRQFLAGS 162 163.macro TRACE_ASM_IRQ_DISABLE 164 bl trace_hardirqs_off 165.endm 166 167.macro TRACE_ASM_IRQ_ENABLE 168 bl trace_hardirqs_on 169.endm 170 171#else 172 173.macro TRACE_ASM_IRQ_DISABLE 174.endm 175 176.macro TRACE_ASM_IRQ_ENABLE 177.endm 178 179#endif 180 181.macro IRQ_DISABLE scratch 182 lr \scratch, [status32] 183 bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) 184 flag \scratch 185 TRACE_ASM_IRQ_DISABLE 186.endm 187 188.macro IRQ_ENABLE scratch 189 TRACE_ASM_IRQ_ENABLE 190 lr \scratch, [status32] 191 or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) 192 flag \scratch 193.endm 194 195#endif /* __ASSEMBLY__ */ 196 197#endif