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1#ifndef _ASM_POWERPC_EXCEPTION_H
2#define _ASM_POWERPC_EXCEPTION_H
3/*
4 * Extracted from head_64.S
5 *
6 * PowerPC version
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
15 *
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
18 *
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
21 *
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
26 */
27/*
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
32 *
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
36 */
37#include <asm/head-64.h>
38
39/* PACA save area offsets (exgen, exmc, etc) */
40#define EX_R9 0
41#define EX_R10 8
42#define EX_R11 16
43#define EX_R12 24
44#define EX_R13 32
45#define EX_DAR 40
46#define EX_DSISR 48
47#define EX_CCR 52
48#define EX_CFAR 56
49#define EX_PPR 64
50#if defined(CONFIG_RELOCATABLE)
51#define EX_CTR 72
52#define EX_SIZE 10 /* size in u64 units */
53#else
54#define EX_SIZE 9 /* size in u64 units */
55#endif
56
57/*
58 * maximum recursive depth of MCE exceptions
59 */
60#define MAX_MCE_DEPTH 4
61
62/*
63 * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR
64 * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole
65 * in the save area so it's not necessary to overlap them. Could be used
66 * for future savings though if another 4 byte register was to be saved.
67 */
68#define EX_LR EX_DAR
69
70/*
71 * EX_R3 is only used by the bad_stack handler. bad_stack reloads and
72 * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap
73 * with EX_DAR.
74 */
75#define EX_R3 EX_DAR
76
77/*
78 * Macros for annotating the expected destination of (h)rfid
79 *
80 * The nop instructions allow us to insert one or more instructions to flush the
81 * L1-D cache when returning to userspace or a guest.
82 */
83#define RFI_FLUSH_SLOT \
84 RFI_FLUSH_FIXUP_SECTION; \
85 nop; \
86 nop; \
87 nop
88
89#define RFI_TO_KERNEL \
90 rfid
91
92#define RFI_TO_USER \
93 RFI_FLUSH_SLOT; \
94 rfid; \
95 b rfi_flush_fallback
96
97#define RFI_TO_USER_OR_KERNEL \
98 RFI_FLUSH_SLOT; \
99 rfid; \
100 b rfi_flush_fallback
101
102#define RFI_TO_GUEST \
103 RFI_FLUSH_SLOT; \
104 rfid; \
105 b rfi_flush_fallback
106
107#define HRFI_TO_KERNEL \
108 hrfid
109
110#define HRFI_TO_USER \
111 RFI_FLUSH_SLOT; \
112 hrfid; \
113 b hrfi_flush_fallback
114
115#define HRFI_TO_USER_OR_KERNEL \
116 RFI_FLUSH_SLOT; \
117 hrfid; \
118 b hrfi_flush_fallback
119
120#define HRFI_TO_GUEST \
121 RFI_FLUSH_SLOT; \
122 hrfid; \
123 b hrfi_flush_fallback
124
125#define HRFI_TO_UNKNOWN \
126 RFI_FLUSH_SLOT; \
127 hrfid; \
128 b hrfi_flush_fallback
129
130#ifdef CONFIG_RELOCATABLE
131#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
132 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
133 LOAD_HANDLER(r12,label); \
134 mtctr r12; \
135 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
136 li r10,MSR_RI; \
137 mtmsrd r10,1; /* Set RI (EE=0) */ \
138 bctr;
139#else
140/* If not relocatable, we can jump directly -- and save messing with LR */
141#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
142 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
143 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
144 li r10,MSR_RI; \
145 mtmsrd r10,1; /* Set RI (EE=0) */ \
146 b label;
147#endif
148#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
149 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
150
151/*
152 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
153 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
154 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
155 */
156#define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
157 EXCEPTION_PROLOG_0(area); \
158 EXCEPTION_PROLOG_1(area, extra, vec); \
159 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
160
161/*
162 * We're short on space and time in the exception prolog, so we can't
163 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label.
164 * Instead we get the base of the kernel from paca->kernelbase and or in the low
165 * part of label. This requires that the label be within 64KB of kernelbase, and
166 * that kernelbase be 64K aligned.
167 */
168#define LOAD_HANDLER(reg, label) \
169 ld reg,PACAKBASE(r13); /* get high part of &label */ \
170 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label);
171
172#define __LOAD_HANDLER(reg, label) \
173 ld reg,PACAKBASE(r13); \
174 ori reg,reg,(ABS_ADDR(label))@l;
175
176/*
177 * Branches from unrelocated code (e.g., interrupts) to labels outside
178 * head-y require >64K offsets.
179 */
180#define __LOAD_FAR_HANDLER(reg, label) \
181 ld reg,PACAKBASE(r13); \
182 ori reg,reg,(ABS_ADDR(label))@l; \
183 addis reg,reg,(ABS_ADDR(label))@h;
184
185/* Exception register prefixes */
186#define EXC_HV H
187#define EXC_STD
188
189#if defined(CONFIG_RELOCATABLE)
190/*
191 * If we support interrupts with relocation on AND we're a relocatable kernel,
192 * we need to use CTR to get to the 2nd level handler. So, save/restore it
193 * when required.
194 */
195#define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13)
196#define GET_CTR(reg, area) ld reg,area+EX_CTR(r13)
197#define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg
198#else
199/* ...else CTR is unused and in register. */
200#define SAVE_CTR(reg, area)
201#define GET_CTR(reg, area) mfctr reg
202#define RESTORE_CTR(reg, area)
203#endif
204
205/*
206 * PPR save/restore macros used in exceptions_64s.S
207 * Used for P7 or later processors
208 */
209#define SAVE_PPR(area, ra, rb) \
210BEGIN_FTR_SECTION_NESTED(940) \
211 ld ra,PACACURRENT(r13); \
212 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \
213 std rb,TASKTHREADPPR(ra); \
214END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
215
216#define RESTORE_PPR_PACA(area, ra) \
217BEGIN_FTR_SECTION_NESTED(941) \
218 ld ra,area+EX_PPR(r13); \
219 mtspr SPRN_PPR,ra; \
220END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
221
222/*
223 * Get an SPR into a register if the CPU has the given feature
224 */
225#define OPT_GET_SPR(ra, spr, ftr) \
226BEGIN_FTR_SECTION_NESTED(943) \
227 mfspr ra,spr; \
228END_FTR_SECTION_NESTED(ftr,ftr,943)
229
230/*
231 * Set an SPR from a register if the CPU has the given feature
232 */
233#define OPT_SET_SPR(ra, spr, ftr) \
234BEGIN_FTR_SECTION_NESTED(943) \
235 mtspr spr,ra; \
236END_FTR_SECTION_NESTED(ftr,ftr,943)
237
238/*
239 * Save a register to the PACA if the CPU has the given feature
240 */
241#define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
242BEGIN_FTR_SECTION_NESTED(943) \
243 std ra,offset(r13); \
244END_FTR_SECTION_NESTED(ftr,ftr,943)
245
246#define EXCEPTION_PROLOG_0(area) \
247 GET_PACA(r13); \
248 std r9,area+EX_R9(r13); /* save r9 */ \
249 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
250 HMT_MEDIUM; \
251 std r10,area+EX_R10(r13); /* save r10 - r12 */ \
252 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
253
254#define __EXCEPTION_PROLOG_1(area, extra, vec) \
255 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
256 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
257 SAVE_CTR(r10, area); \
258 mfcr r9; \
259 extra(vec); \
260 std r11,area+EX_R11(r13); \
261 std r12,area+EX_R12(r13); \
262 GET_SCRATCH0(r10); \
263 std r10,area+EX_R13(r13)
264#define EXCEPTION_PROLOG_1(area, extra, vec) \
265 __EXCEPTION_PROLOG_1(area, extra, vec)
266
267#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
268 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
269 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
270 LOAD_HANDLER(r12,label) \
271 mtspr SPRN_##h##SRR0,r12; \
272 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
273 mtspr SPRN_##h##SRR1,r10; \
274 h##RFI_TO_KERNEL; \
275 b . /* prevent speculative execution */
276#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
277 __EXCEPTION_PROLOG_PSERIES_1(label, h)
278
279/* _NORI variant keeps MSR_RI clear */
280#define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \
281 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
282 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \
283 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
284 LOAD_HANDLER(r12,label) \
285 mtspr SPRN_##h##SRR0,r12; \
286 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
287 mtspr SPRN_##h##SRR1,r10; \
288 h##RFI_TO_KERNEL; \
289 b . /* prevent speculative execution */
290
291#define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \
292 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h)
293
294#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
295 EXCEPTION_PROLOG_0(area); \
296 EXCEPTION_PROLOG_1(area, extra, vec); \
297 EXCEPTION_PROLOG_PSERIES_1(label, h);
298
299#define __KVMTEST(h, n) \
300 lbz r10,HSTATE_IN_GUEST(r13); \
301 cmpwi r10,0; \
302 bne do_kvm_##h##n
303
304#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
305/*
306 * If hv is possible, interrupts come into to the hv version
307 * of the kvmppc_interrupt code, which then jumps to the PR handler,
308 * kvmppc_interrupt_pr, if the guest is a PR guest.
309 */
310#define kvmppc_interrupt kvmppc_interrupt_hv
311#else
312#define kvmppc_interrupt kvmppc_interrupt_pr
313#endif
314
315/*
316 * Branch to label using its 0xC000 address. This results in instruction
317 * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned
318 * on using mtmsr rather than rfid.
319 *
320 * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than
321 * load KBASE for a slight optimisation.
322 */
323#define BRANCH_TO_C000(reg, label) \
324 __LOAD_HANDLER(reg, label); \
325 mtctr reg; \
326 bctr
327
328#ifdef CONFIG_RELOCATABLE
329#define BRANCH_TO_COMMON(reg, label) \
330 __LOAD_HANDLER(reg, label); \
331 mtctr reg; \
332 bctr
333
334#define BRANCH_LINK_TO_FAR(label) \
335 __LOAD_FAR_HANDLER(r12, label); \
336 mtctr r12; \
337 bctrl
338
339/*
340 * KVM requires __LOAD_FAR_HANDLER.
341 *
342 * __BRANCH_TO_KVM_EXIT branches are also a special case because they
343 * explicitly use r9 then reload it from PACA before branching. Hence
344 * the double-underscore.
345 */
346#define __BRANCH_TO_KVM_EXIT(area, label) \
347 mfctr r9; \
348 std r9,HSTATE_SCRATCH1(r13); \
349 __LOAD_FAR_HANDLER(r9, label); \
350 mtctr r9; \
351 ld r9,area+EX_R9(r13); \
352 bctr
353
354#else
355#define BRANCH_TO_COMMON(reg, label) \
356 b label
357
358#define BRANCH_LINK_TO_FAR(label) \
359 bl label
360
361#define __BRANCH_TO_KVM_EXIT(area, label) \
362 ld r9,area+EX_R9(r13); \
363 b label
364
365#endif
366
367/* Do not enable RI */
368#define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \
369 EXCEPTION_PROLOG_0(area); \
370 EXCEPTION_PROLOG_1(area, extra, vec); \
371 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h);
372
373
374#define __KVM_HANDLER(area, h, n) \
375 BEGIN_FTR_SECTION_NESTED(947) \
376 ld r10,area+EX_CFAR(r13); \
377 std r10,HSTATE_CFAR(r13); \
378 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \
379 BEGIN_FTR_SECTION_NESTED(948) \
380 ld r10,area+EX_PPR(r13); \
381 std r10,HSTATE_PPR(r13); \
382 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
383 ld r10,area+EX_R10(r13); \
384 std r12,HSTATE_SCRATCH0(r13); \
385 sldi r12,r9,32; \
386 ori r12,r12,(n); \
387 /* This reloads r9 before branching to kvmppc_interrupt */ \
388 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt)
389
390#define __KVM_HANDLER_SKIP(area, h, n) \
391 cmpwi r10,KVM_GUEST_MODE_SKIP; \
392 beq 89f; \
393 BEGIN_FTR_SECTION_NESTED(948) \
394 ld r10,area+EX_PPR(r13); \
395 std r10,HSTATE_PPR(r13); \
396 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
397 ld r10,area+EX_R10(r13); \
398 std r12,HSTATE_SCRATCH0(r13); \
399 sldi r12,r9,32; \
400 ori r12,r12,(n); \
401 /* This reloads r9 before branching to kvmppc_interrupt */ \
402 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \
40389: mtocrf 0x80,r9; \
404 ld r9,area+EX_R9(r13); \
405 ld r10,area+EX_R10(r13); \
406 b kvmppc_skip_##h##interrupt
407
408#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
409#define KVMTEST(h, n) __KVMTEST(h, n)
410#define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
411#define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
412
413#else
414#define KVMTEST(h, n)
415#define KVM_HANDLER(area, h, n)
416#define KVM_HANDLER_SKIP(area, h, n)
417#endif
418
419#define NOTEST(n)
420
421#define EXCEPTION_PROLOG_COMMON_1() \
422 std r9,_CCR(r1); /* save CR in stackframe */ \
423 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
424 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
425 std r10,0(r1); /* make stack chain pointer */ \
426 std r0,GPR0(r1); /* save r0 in stackframe */ \
427 std r10,GPR1(r1); /* save r1 in stackframe */ \
428
429
430/*
431 * The common exception prolog is used for all except a few exceptions
432 * such as a segment miss on a kernel address. We have to be prepared
433 * to take another exception from the point where we first touch the
434 * kernel stack onwards.
435 *
436 * On entry r13 points to the paca, r9-r13 are saved in the paca,
437 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
438 * SRR1, and relocation is on.
439 */
440#define EXCEPTION_PROLOG_COMMON(n, area) \
441 andi. r10,r12,MSR_PR; /* See if coming from user */ \
442 mr r10,r1; /* Save r1 */ \
443 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
444 beq- 1f; \
445 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
4461: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \
447 blt+ cr1,3f; /* abort if it is */ \
448 li r1,(n); /* will be reloaded later */ \
449 sth r1,PACA_TRAP_SAVE(r13); \
450 std r3,area+EX_R3(r13); \
451 addi r3,r13,area; /* r3 -> where regs are saved*/ \
452 RESTORE_CTR(r1, area); \
453 b bad_stack; \
4543: EXCEPTION_PROLOG_COMMON_1(); \
455 beq 4f; /* if from kernel mode */ \
456 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \
457 SAVE_PPR(area, r9, r10); \
4584: EXCEPTION_PROLOG_COMMON_2(area) \
459 EXCEPTION_PROLOG_COMMON_3(n) \
460 ACCOUNT_STOLEN_TIME
461
462/* Save original regs values from save area to stack frame. */
463#define EXCEPTION_PROLOG_COMMON_2(area) \
464 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
465 ld r10,area+EX_R10(r13); \
466 std r9,GPR9(r1); \
467 std r10,GPR10(r1); \
468 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
469 ld r10,area+EX_R12(r13); \
470 ld r11,area+EX_R13(r13); \
471 std r9,GPR11(r1); \
472 std r10,GPR12(r1); \
473 std r11,GPR13(r1); \
474 BEGIN_FTR_SECTION_NESTED(66); \
475 ld r10,area+EX_CFAR(r13); \
476 std r10,ORIG_GPR3(r1); \
477 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
478 GET_CTR(r10, area); \
479 std r10,_CTR(r1);
480
481#define EXCEPTION_PROLOG_COMMON_3(n) \
482 std r2,GPR2(r1); /* save r2 in stackframe */ \
483 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
484 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
485 mflr r9; /* Get LR, later save to stack */ \
486 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
487 std r9,_LINK(r1); \
488 lbz r10,PACASOFTIRQEN(r13); \
489 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
490 std r10,SOFTE(r1); \
491 std r11,_XER(r1); \
492 li r9,(n)+1; \
493 std r9,_TRAP(r1); /* set trap number */ \
494 li r10,0; \
495 ld r11,exception_marker@toc(r2); \
496 std r10,RESULT(r1); /* clear regs->result */ \
497 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */
498
499/*
500 * Exception vectors.
501 */
502#define STD_EXCEPTION_PSERIES(vec, label) \
503 SET_SCRATCH0(r13); /* save r13 */ \
504 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
505 EXC_STD, KVMTEST_PR, vec); \
506
507/* Version of above for when we have to branch out-of-line */
508#define __OOL_EXCEPTION(vec, label, hdlr) \
509 SET_SCRATCH0(r13) \
510 EXCEPTION_PROLOG_0(PACA_EXGEN) \
511 b hdlr;
512
513#define STD_EXCEPTION_PSERIES_OOL(vec, label) \
514 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
515 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
516
517#define STD_EXCEPTION_HV(loc, vec, label) \
518 SET_SCRATCH0(r13); /* save r13 */ \
519 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
520 EXC_HV, KVMTEST_HV, vec);
521
522#define STD_EXCEPTION_HV_OOL(vec, label) \
523 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
524 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
525
526#define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
527 /* No guest interrupts come through here */ \
528 SET_SCRATCH0(r13); /* save r13 */ \
529 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec);
530
531#define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
532 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
533 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD)
534
535#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
536 SET_SCRATCH0(r13); /* save r13 */ \
537 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \
538 EXC_HV, KVMTEST_HV, vec);
539
540#define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
541 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
542 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
543
544/* This associate vector numbers with bits in paca->irq_happened */
545#define SOFTEN_VALUE_0x500 PACA_IRQ_EE
546#define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
547#define SOFTEN_VALUE_0x980 PACA_IRQ_DEC
548#define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
549#define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
550#define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI
551#define SOFTEN_VALUE_0xea0 PACA_IRQ_EE
552
553#define __SOFTEN_TEST(h, vec) \
554 lbz r10,PACASOFTIRQEN(r13); \
555 cmpwi r10,0; \
556 li r10,SOFTEN_VALUE_##vec; \
557 beq masked_##h##interrupt
558
559#define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
560
561#define SOFTEN_TEST_PR(vec) \
562 KVMTEST(EXC_STD, vec); \
563 _SOFTEN_TEST(EXC_STD, vec)
564
565#define SOFTEN_TEST_HV(vec) \
566 KVMTEST(EXC_HV, vec); \
567 _SOFTEN_TEST(EXC_HV, vec)
568
569#define KVMTEST_PR(vec) \
570 KVMTEST(EXC_STD, vec)
571
572#define KVMTEST_HV(vec) \
573 KVMTEST(EXC_HV, vec)
574
575#define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
576#define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
577
578#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
579 SET_SCRATCH0(r13); /* save r13 */ \
580 EXCEPTION_PROLOG_0(PACA_EXGEN); \
581 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
582 EXCEPTION_PROLOG_PSERIES_1(label, h);
583
584#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
585 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
586
587#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
588 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
589 EXC_STD, SOFTEN_TEST_PR)
590
591#define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \
592 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \
593 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
594
595#define MASKABLE_EXCEPTION_HV(loc, vec, label) \
596 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
597 EXC_HV, SOFTEN_TEST_HV)
598
599#define MASKABLE_EXCEPTION_HV_OOL(vec, label) \
600 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
601 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
602
603#define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
604 SET_SCRATCH0(r13); /* save r13 */ \
605 EXCEPTION_PROLOG_0(PACA_EXGEN); \
606 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
607 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
608
609#define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
610 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
611
612#define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
613 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
614 EXC_STD, SOFTEN_NOTEST_PR)
615
616#define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
617 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
618 EXC_HV, SOFTEN_TEST_HV)
619
620#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \
621 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
622 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
623
624/*
625 * Our exception common code can be passed various "additions"
626 * to specify the behaviour of interrupts, whether to kick the
627 * runlatch, etc...
628 */
629
630/*
631 * This addition reconciles our actual IRQ state with the various software
632 * flags that track it. This may call C code.
633 */
634#define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11)
635
636#define ADD_NVGPRS \
637 bl save_nvgprs
638
639#define RUNLATCH_ON \
640BEGIN_FTR_SECTION \
641 CURRENT_THREAD_INFO(r3, r1); \
642 ld r4,TI_LOCAL_FLAGS(r3); \
643 andi. r0,r4,_TLF_RUNLATCH; \
644 beql ppc64_runlatch_on_trampoline; \
645END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
646
647#define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \
648 EXCEPTION_PROLOG_COMMON(trap, area); \
649 /* Volatile regs are potentially clobbered here */ \
650 additions; \
651 addi r3,r1,STACK_FRAME_OVERHEAD; \
652 bl hdlr; \
653 b ret
654
655/*
656 * Exception where stack is already set in r1, r1 is saved in r10, and it
657 * continues rather than returns.
658 */
659#define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \
660 EXCEPTION_PROLOG_COMMON_1(); \
661 EXCEPTION_PROLOG_COMMON_2(area); \
662 EXCEPTION_PROLOG_COMMON_3(trap); \
663 /* Volatile regs are potentially clobbered here */ \
664 additions; \
665 addi r3,r1,STACK_FRAME_OVERHEAD; \
666 bl hdlr
667
668#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
669 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \
670 ret_from_except, ADD_NVGPRS;ADD_RECONCILE)
671
672/*
673 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
674 * in the idle task and therefore need the special idle handling
675 * (finish nap and runlatch)
676 */
677#define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
678 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \
679 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON)
680
681/*
682 * When the idle code in power4_idle puts the CPU into NAP mode,
683 * it has to do so in a loop, and relies on the external interrupt
684 * and decrementer interrupt entry code to get it out of the loop.
685 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
686 * to signal that it is in the loop and needs help to get out.
687 */
688#ifdef CONFIG_PPC_970_NAP
689#define FINISH_NAP \
690BEGIN_FTR_SECTION \
691 CURRENT_THREAD_INFO(r11, r1); \
692 ld r9,TI_LOCAL_FLAGS(r11); \
693 andi. r10,r9,_TLF_NAPPING; \
694 bnel power4_fixup_nap; \
695END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
696#else
697#define FINISH_NAP
698#endif
699
700#endif /* _ASM_POWERPC_EXCEPTION_H */