Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v4.15-rc6 416 lines 10 kB view raw
1/* 2 * Copyright © 2007 David Airlie 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * David Airlie 25 */ 26#include <linux/module.h> 27#include <linux/slab.h> 28#include <linux/pm_runtime.h> 29 30#include <drm/drmP.h> 31#include <drm/drm_crtc.h> 32#include <drm/drm_crtc_helper.h> 33#include <drm/amdgpu_drm.h> 34#include "amdgpu.h" 35#include "cikd.h" 36 37#include <drm/drm_fb_helper.h> 38 39#include <linux/vga_switcheroo.h> 40 41/* object hierarchy - 42 this contains a helper + a amdgpu fb 43 the helper contains a pointer to amdgpu framebuffer baseclass. 44*/ 45 46static int 47amdgpufb_open(struct fb_info *info, int user) 48{ 49 struct amdgpu_fbdev *rfbdev = info->par; 50 struct amdgpu_device *adev = rfbdev->adev; 51 int ret = pm_runtime_get_sync(adev->ddev->dev); 52 if (ret < 0 && ret != -EACCES) { 53 pm_runtime_mark_last_busy(adev->ddev->dev); 54 pm_runtime_put_autosuspend(adev->ddev->dev); 55 return ret; 56 } 57 return 0; 58} 59 60static int 61amdgpufb_release(struct fb_info *info, int user) 62{ 63 struct amdgpu_fbdev *rfbdev = info->par; 64 struct amdgpu_device *adev = rfbdev->adev; 65 66 pm_runtime_mark_last_busy(adev->ddev->dev); 67 pm_runtime_put_autosuspend(adev->ddev->dev); 68 return 0; 69} 70 71static struct fb_ops amdgpufb_ops = { 72 .owner = THIS_MODULE, 73 DRM_FB_HELPER_DEFAULT_OPS, 74 .fb_open = amdgpufb_open, 75 .fb_release = amdgpufb_release, 76 .fb_fillrect = drm_fb_helper_cfb_fillrect, 77 .fb_copyarea = drm_fb_helper_cfb_copyarea, 78 .fb_imageblit = drm_fb_helper_cfb_imageblit, 79}; 80 81 82int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled) 83{ 84 int aligned = width; 85 int pitch_mask = 0; 86 87 switch (cpp) { 88 case 1: 89 pitch_mask = 255; 90 break; 91 case 2: 92 pitch_mask = 127; 93 break; 94 case 3: 95 case 4: 96 pitch_mask = 63; 97 break; 98 } 99 100 aligned += pitch_mask; 101 aligned &= ~pitch_mask; 102 return aligned * cpp; 103} 104 105static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj) 106{ 107 struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj); 108 int ret; 109 110 ret = amdgpu_bo_reserve(abo, true); 111 if (likely(ret == 0)) { 112 amdgpu_bo_kunmap(abo); 113 amdgpu_bo_unpin(abo); 114 amdgpu_bo_unreserve(abo); 115 } 116 drm_gem_object_put_unlocked(gobj); 117} 118 119static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev, 120 struct drm_mode_fb_cmd2 *mode_cmd, 121 struct drm_gem_object **gobj_p) 122{ 123 struct amdgpu_device *adev = rfbdev->adev; 124 struct drm_gem_object *gobj = NULL; 125 struct amdgpu_bo *abo = NULL; 126 bool fb_tiled = false; /* useful for testing */ 127 u32 tiling_flags = 0; 128 int ret; 129 int aligned_size, size; 130 int height = mode_cmd->height; 131 u32 cpp; 132 133 cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0); 134 135 /* need to align pitch with crtc limits */ 136 mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp, 137 fb_tiled); 138 139 height = ALIGN(mode_cmd->height, 8); 140 size = mode_cmd->pitches[0] * height; 141 aligned_size = ALIGN(size, PAGE_SIZE); 142 ret = amdgpu_gem_object_create(adev, aligned_size, 0, 143 AMDGPU_GEM_DOMAIN_VRAM, 144 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | 145 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS | 146 AMDGPU_GEM_CREATE_VRAM_CLEARED, 147 true, NULL, &gobj); 148 if (ret) { 149 pr_err("failed to allocate framebuffer (%d)\n", aligned_size); 150 return -ENOMEM; 151 } 152 abo = gem_to_amdgpu_bo(gobj); 153 154 if (fb_tiled) 155 tiling_flags = AMDGPU_TILING_SET(ARRAY_MODE, GRPH_ARRAY_2D_TILED_THIN1); 156 157 ret = amdgpu_bo_reserve(abo, false); 158 if (unlikely(ret != 0)) 159 goto out_unref; 160 161 if (tiling_flags) { 162 ret = amdgpu_bo_set_tiling_flags(abo, 163 tiling_flags); 164 if (ret) 165 dev_err(adev->dev, "FB failed to set tiling flags\n"); 166 } 167 168 169 ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, NULL); 170 if (ret) { 171 amdgpu_bo_unreserve(abo); 172 goto out_unref; 173 } 174 ret = amdgpu_bo_kmap(abo, NULL); 175 amdgpu_bo_unreserve(abo); 176 if (ret) { 177 goto out_unref; 178 } 179 180 *gobj_p = gobj; 181 return 0; 182out_unref: 183 amdgpufb_destroy_pinned_object(gobj); 184 *gobj_p = NULL; 185 return ret; 186} 187 188static int amdgpufb_create(struct drm_fb_helper *helper, 189 struct drm_fb_helper_surface_size *sizes) 190{ 191 struct amdgpu_fbdev *rfbdev = (struct amdgpu_fbdev *)helper; 192 struct amdgpu_device *adev = rfbdev->adev; 193 struct fb_info *info; 194 struct drm_framebuffer *fb = NULL; 195 struct drm_mode_fb_cmd2 mode_cmd; 196 struct drm_gem_object *gobj = NULL; 197 struct amdgpu_bo *abo = NULL; 198 int ret; 199 unsigned long tmp; 200 201 mode_cmd.width = sizes->surface_width; 202 mode_cmd.height = sizes->surface_height; 203 204 if (sizes->surface_bpp == 24) 205 sizes->surface_bpp = 32; 206 207 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, 208 sizes->surface_depth); 209 210 ret = amdgpufb_create_pinned_object(rfbdev, &mode_cmd, &gobj); 211 if (ret) { 212 DRM_ERROR("failed to create fbcon object %d\n", ret); 213 return ret; 214 } 215 216 abo = gem_to_amdgpu_bo(gobj); 217 218 /* okay we have an object now allocate the framebuffer */ 219 info = drm_fb_helper_alloc_fbi(helper); 220 if (IS_ERR(info)) { 221 ret = PTR_ERR(info); 222 goto out; 223 } 224 225 info->par = rfbdev; 226 info->skip_vt_switch = true; 227 228 ret = amdgpu_framebuffer_init(adev->ddev, &rfbdev->rfb, &mode_cmd, gobj); 229 if (ret) { 230 DRM_ERROR("failed to initialize framebuffer %d\n", ret); 231 goto out; 232 } 233 234 fb = &rfbdev->rfb.base; 235 236 /* setup helper */ 237 rfbdev->helper.fb = fb; 238 239 strcpy(info->fix.id, "amdgpudrmfb"); 240 241 drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth); 242 243 info->fbops = &amdgpufb_ops; 244 245 tmp = amdgpu_bo_gpu_offset(abo) - adev->mc.vram_start; 246 info->fix.smem_start = adev->mc.aper_base + tmp; 247 info->fix.smem_len = amdgpu_bo_size(abo); 248 info->screen_base = amdgpu_bo_kptr(abo); 249 info->screen_size = amdgpu_bo_size(abo); 250 251 drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); 252 253 /* setup aperture base/size for vesafb takeover */ 254 info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base; 255 info->apertures->ranges[0].size = adev->mc.aper_size; 256 257 /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */ 258 259 if (info->screen_base == NULL) { 260 ret = -ENOSPC; 261 goto out; 262 } 263 264 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); 265 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->mc.aper_base); 266 DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(abo)); 267 DRM_INFO("fb depth is %d\n", fb->format->depth); 268 DRM_INFO(" pitch is %d\n", fb->pitches[0]); 269 270 vga_switcheroo_client_fb_set(adev->ddev->pdev, info); 271 return 0; 272 273out: 274 if (abo) { 275 276 } 277 if (fb && ret) { 278 drm_gem_object_put_unlocked(gobj); 279 drm_framebuffer_unregister_private(fb); 280 drm_framebuffer_cleanup(fb); 281 kfree(fb); 282 } 283 return ret; 284} 285 286void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev) 287{ 288 if (adev->mode_info.rfbdev) 289 drm_fb_helper_hotplug_event(&adev->mode_info.rfbdev->helper); 290} 291 292static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev) 293{ 294 struct amdgpu_framebuffer *rfb = &rfbdev->rfb; 295 296 drm_fb_helper_unregister_fbi(&rfbdev->helper); 297 298 if (rfb->obj) { 299 amdgpufb_destroy_pinned_object(rfb->obj); 300 rfb->obj = NULL; 301 drm_framebuffer_unregister_private(&rfb->base); 302 drm_framebuffer_cleanup(&rfb->base); 303 } 304 drm_fb_helper_fini(&rfbdev->helper); 305 306 return 0; 307} 308 309static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = { 310 .fb_probe = amdgpufb_create, 311}; 312 313int amdgpu_fbdev_init(struct amdgpu_device *adev) 314{ 315 struct amdgpu_fbdev *rfbdev; 316 int bpp_sel = 32; 317 int ret; 318 319 /* don't init fbdev on hw without DCE */ 320 if (!adev->mode_info.mode_config_initialized) 321 return 0; 322 323 /* don't init fbdev if there are no connectors */ 324 if (list_empty(&adev->ddev->mode_config.connector_list)) 325 return 0; 326 327 /* select 8 bpp console on low vram cards */ 328 if (adev->mc.real_vram_size <= (32*1024*1024)) 329 bpp_sel = 8; 330 331 rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL); 332 if (!rfbdev) 333 return -ENOMEM; 334 335 rfbdev->adev = adev; 336 adev->mode_info.rfbdev = rfbdev; 337 338 drm_fb_helper_prepare(adev->ddev, &rfbdev->helper, 339 &amdgpu_fb_helper_funcs); 340 341 ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper, 342 AMDGPUFB_CONN_LIMIT); 343 if (ret) { 344 kfree(rfbdev); 345 return ret; 346 } 347 348 drm_fb_helper_single_add_all_connectors(&rfbdev->helper); 349 350 /* disable all the possible outputs/crtcs before entering KMS mode */ 351 if (!amdgpu_device_has_dc_support(adev)) 352 drm_helper_disable_unused_functions(adev->ddev); 353 354 drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); 355 return 0; 356} 357 358void amdgpu_fbdev_fini(struct amdgpu_device *adev) 359{ 360 if (!adev->mode_info.rfbdev) 361 return; 362 363 amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev); 364 kfree(adev->mode_info.rfbdev); 365 adev->mode_info.rfbdev = NULL; 366} 367 368void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state) 369{ 370 if (adev->mode_info.rfbdev) 371 drm_fb_helper_set_suspend(&adev->mode_info.rfbdev->helper, 372 state); 373} 374 375int amdgpu_fbdev_total_size(struct amdgpu_device *adev) 376{ 377 struct amdgpu_bo *robj; 378 int size = 0; 379 380 if (!adev->mode_info.rfbdev) 381 return 0; 382 383 robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj); 384 size += amdgpu_bo_size(robj); 385 return size; 386} 387 388bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj) 389{ 390 if (!adev->mode_info.rfbdev) 391 return false; 392 if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj)) 393 return true; 394 return false; 395} 396 397void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev) 398{ 399 struct amdgpu_fbdev *afbdev; 400 struct drm_fb_helper *fb_helper; 401 int ret; 402 403 if (!adev) 404 return; 405 406 afbdev = adev->mode_info.rfbdev; 407 408 if (!afbdev) 409 return; 410 411 fb_helper = &afbdev->helper; 412 413 ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper); 414 if (ret) 415 DRM_DEBUG("failed to restore crtc mode\n"); 416}