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1Texas Instruments sysc interconnect target module wrapper binding
2
3Texas Instruments SoCs can have a generic interconnect target module
4hardware for devices connected to various interconnects such as L3
5interconnect (Arteris NoC) and L4 interconnect (Sonics s3220). The sysc
6is mostly used for interaction between module and PRCM. It participates
7in the OCP Disconnect Protocol but other than that is mostly independent
8of the interconnect.
9
10Each interconnect target module can have one or more devices connected to
11it. There is a set of control registers for managing interconnect target
12module clocks, idle modes and interconnect level resets for the module.
13
14These control registers are sprinkled into the unused register address
15space of the first child device IP block managed by the interconnect
16target module and typically are named REVISION, SYSCONFIG and SYSSTATUS.
17
18Required standard properties:
19
20- compatible shall be one of the following generic types:
21
22 "ti,sysc-omap2"
23 "ti,sysc-omap4"
24 "ti,sysc-omap4-simple"
25
26 or one of the following derivative types for hardware
27 needing special workarounds:
28
29 "ti,sysc-omap3430-sr"
30 "ti,sysc-omap3630-sr"
31 "ti,sysc-omap4-sr"
32 "ti,sysc-omap3-sham"
33 "ti,sysc-omap-aes"
34 "ti,sysc-mcasp"
35 "ti,sysc-usb-host-fs"
36
37- reg shall have register areas implemented for the interconnect
38 target module in question such as revision, sysc and syss
39
40- reg-names shall contain the register names implemented for the
41 interconnect target module in question such as
42 "rev, "sysc", and "syss"
43
44- ranges shall contain the interconnect target module IO range
45 available for one or more child device IP blocks managed
46 by the interconnect target module, the ranges may include
47 multiple ranges such as device L4 range for control and
48 parent L3 range for DMA access
49
50Optional properties:
51
52- clocks clock specifier for each name in the clock-names as
53 specified in the binding documentation for ti-clkctrl,
54 typically available for all interconnect targets on TI SoCs
55 based on omap4 except if it's read-only register in hwauto
56 mode as for example omap4 L4_CFG_CLKCTRL
57
58- clock-names should contain at least "fck", and optionally also "ick"
59 depending on the SoC and the interconnect target module
60
61- ti,hwmods optional TI interconnect module name to use legacy
62 hwmod platform data
63
64
65Example: Single instance of MUSB controller on omap4 using interconnect ranges
66using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000):
67
68 target-module@2b000 { /* 0x4a0ab000, ap 84 12.0 */
69 compatible = "ti,sysc-omap2";
70 ti,hwmods = "usb_otg_hs";
71 reg = <0x2b400 0x4>,
72 <0x2b404 0x4>,
73 <0x2b408 0x4>;
74 reg-names = "rev", "sysc", "syss";
75 clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
76 clock-names = "fck";
77 #address-cells = <1>;
78 #size-cells = <1>;
79 ranges = <0 0x2b000 0x1000>;
80
81 usb_otg_hs: otg@0 {
82 compatible = "ti,omap4-musb";
83 reg = <0x0 0x7ff>;
84 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
85 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
86 usb-phy = <&usb2_phy>;
87 ...
88 };
89 };
90
91Note that other SoCs, such as am335x can have multipe child devices. On am335x
92there are two MUSB instances, two USB PHY instances, and a single CPPI41 DMA
93instance as children of a single interconnet target module.