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Linux kernel mirror (for testing)
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1/*
2 * smp.h: PowerPC-specific SMP code.
3 *
4 * Original was a copy of sparc smp.h. Now heavily modified
5 * for PPC.
6 *
7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#ifndef _ASM_POWERPC_SMP_H
17#define _ASM_POWERPC_SMP_H
18#ifdef __KERNEL__
19
20#include <linux/threads.h>
21#include <linux/cpumask.h>
22#include <linux/kernel.h>
23#include <linux/irqreturn.h>
24
25#ifndef __ASSEMBLY__
26
27#ifdef CONFIG_PPC64
28#include <asm/paca.h>
29#endif
30#include <asm/percpu.h>
31
32extern int boot_cpuid;
33extern int spinning_secondaries;
34
35extern void cpu_die(void);
36extern int cpu_to_chip_id(int cpu);
37
38#ifdef CONFIG_SMP
39
40struct smp_ops_t {
41 void (*message_pass)(int cpu, int msg);
42#ifdef CONFIG_PPC_SMP_MUXED_IPI
43 void (*cause_ipi)(int cpu);
44#endif
45 int (*cause_nmi_ipi)(int cpu);
46 void (*probe)(void);
47 int (*kick_cpu)(int nr);
48 int (*prepare_cpu)(int nr);
49 void (*setup_cpu)(int nr);
50 void (*bringup_done)(void);
51 void (*take_timebase)(void);
52 void (*give_timebase)(void);
53 int (*cpu_disable)(void);
54 void (*cpu_die)(unsigned int nr);
55 int (*cpu_bootable)(unsigned int nr);
56};
57
58extern void smp_flush_nmi_ipi(u64 delay_us);
59extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
60extern void smp_send_debugger_break(void);
61extern void start_secondary_resume(void);
62extern void smp_generic_give_timebase(void);
63extern void smp_generic_take_timebase(void);
64
65DECLARE_PER_CPU(unsigned int, cpu_pvr);
66
67#ifdef CONFIG_HOTPLUG_CPU
68int generic_cpu_disable(void);
69void generic_cpu_die(unsigned int cpu);
70void generic_set_cpu_dead(unsigned int cpu);
71void generic_set_cpu_up(unsigned int cpu);
72int generic_check_cpu_restart(unsigned int cpu);
73int is_cpu_dead(unsigned int cpu);
74#else
75#define generic_set_cpu_up(i) do { } while (0)
76#endif
77
78#ifdef CONFIG_PPC64
79#define raw_smp_processor_id() (local_paca->paca_index)
80#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
81#else
82/* 32-bit */
83extern int smp_hw_index[];
84
85#define raw_smp_processor_id() (current_thread_info()->cpu)
86#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
87
88static inline int get_hard_smp_processor_id(int cpu)
89{
90 return smp_hw_index[cpu];
91}
92
93static inline void set_hard_smp_processor_id(int cpu, int phys)
94{
95 smp_hw_index[cpu] = phys;
96}
97#endif
98
99DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
100DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
101DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
102
103static inline struct cpumask *cpu_sibling_mask(int cpu)
104{
105 return per_cpu(cpu_sibling_map, cpu);
106}
107
108static inline struct cpumask *cpu_core_mask(int cpu)
109{
110 return per_cpu(cpu_core_map, cpu);
111}
112
113static inline struct cpumask *cpu_l2_cache_mask(int cpu)
114{
115 return per_cpu(cpu_l2_cache_map, cpu);
116}
117
118extern int cpu_to_core_id(int cpu);
119
120/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
121 *
122 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
123 * in /proc/interrupts will be wrong!!! --Troy */
124#define PPC_MSG_CALL_FUNCTION 0
125#define PPC_MSG_RESCHEDULE 1
126#define PPC_MSG_TICK_BROADCAST 2
127#define PPC_MSG_NMI_IPI 3
128
129/* This is only used by the powernv kernel */
130#define PPC_MSG_RM_HOST_ACTION 4
131
132#define NMI_IPI_ALL_OTHERS -2
133
134#ifdef CONFIG_NMI_IPI
135extern int smp_handle_nmi_ipi(struct pt_regs *regs);
136#else
137static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
138#endif
139
140/* for irq controllers that have dedicated ipis per message (4) */
141extern int smp_request_message_ipi(int virq, int message);
142extern const char *smp_ipi_name[];
143
144/* for irq controllers with only a single ipi */
145extern void smp_muxed_ipi_message_pass(int cpu, int msg);
146extern void smp_muxed_ipi_set_message(int cpu, int msg);
147extern irqreturn_t smp_ipi_demux(void);
148extern irqreturn_t smp_ipi_demux_relaxed(void);
149
150void smp_init_pSeries(void);
151void smp_init_cell(void);
152void smp_setup_cpu_maps(void);
153
154extern int __cpu_disable(void);
155extern void __cpu_die(unsigned int cpu);
156
157#else
158/* for UP */
159#define hard_smp_processor_id() get_hard_smp_processor_id(0)
160#define smp_setup_cpu_maps()
161static inline void inhibit_secondary_onlining(void) {}
162static inline void uninhibit_secondary_onlining(void) {}
163static inline const struct cpumask *cpu_sibling_mask(int cpu)
164{
165 return cpumask_of(cpu);
166}
167
168#endif /* CONFIG_SMP */
169
170#ifdef CONFIG_PPC64
171static inline int get_hard_smp_processor_id(int cpu)
172{
173 return paca[cpu].hw_cpu_id;
174}
175
176static inline void set_hard_smp_processor_id(int cpu, int phys)
177{
178 paca[cpu].hw_cpu_id = phys;
179}
180#else
181/* 32-bit */
182#ifndef CONFIG_SMP
183extern int boot_cpuid_phys;
184static inline int get_hard_smp_processor_id(int cpu)
185{
186 return boot_cpuid_phys;
187}
188
189static inline void set_hard_smp_processor_id(int cpu, int phys)
190{
191 boot_cpuid_phys = phys;
192}
193#endif /* !CONFIG_SMP */
194#endif /* !CONFIG_PPC64 */
195
196#if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
197extern void smp_release_cpus(void);
198#else
199static inline void smp_release_cpus(void) { };
200#endif
201
202extern int smt_enabled_at_boot;
203
204extern void smp_mpic_probe(void);
205extern void smp_mpic_setup_cpu(int cpu);
206extern int smp_generic_kick_cpu(int nr);
207extern int smp_generic_cpu_bootable(unsigned int nr);
208
209
210extern void smp_generic_give_timebase(void);
211extern void smp_generic_take_timebase(void);
212
213extern struct smp_ops_t *smp_ops;
214
215extern void arch_send_call_function_single_ipi(int cpu);
216extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
217
218/* Definitions relative to the secondary CPU spin loop
219 * and entry point. Not all of them exist on both 32 and
220 * 64-bit but defining them all here doesn't harm
221 */
222extern void generic_secondary_smp_init(void);
223extern void generic_secondary_thread_init(void);
224extern unsigned long __secondary_hold_spinloop;
225extern unsigned long __secondary_hold_acknowledge;
226extern char __secondary_hold;
227extern unsigned int booting_thread_hwid;
228
229extern void __early_start(void);
230#endif /* __ASSEMBLY__ */
231
232#endif /* __KERNEL__ */
233#endif /* _ASM_POWERPC_SMP_H) */