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1Atmel AT91 device tree bindings.
2================================
3
4Boards with a SoC of the Atmel AT91 or SMART family shall have the following
5properties:
6
7Required root node properties:
8compatible: must be one of:
9 * "atmel,at91rm9200"
10
11 * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
12 the specific SoC family or compatible:
13 o "atmel,at91sam9260"
14 o "atmel,at91sam9261"
15 o "atmel,at91sam9263"
16 o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
17 SoC compatible:
18 - "atmel,at91sam9g15"
19 - "atmel,at91sam9g25"
20 - "atmel,at91sam9g35"
21 - "atmel,at91sam9x25"
22 - "atmel,at91sam9x35"
23 o "atmel,at91sam9g20"
24 o "atmel,at91sam9g45"
25 o "atmel,at91sam9n12"
26 o "atmel,at91sam9rl"
27 o "atmel,at91sam9xe"
28 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
29 SoC family:
30 o "atmel,sama5d2" shall be extended with the specific SoC compatible:
31 - "atmel,sama5d27"
32 o "atmel,sama5d3" shall be extended with the specific SoC compatible:
33 - "atmel,sama5d31"
34 - "atmel,sama5d33"
35 - "atmel,sama5d34"
36 - "atmel,sama5d35"
37 - "atmel,sama5d36"
38 o "atmel,sama5d4" shall be extended with the specific SoC compatible:
39 - "atmel,sama5d41"
40 - "atmel,sama5d42"
41 - "atmel,sama5d43"
42 - "atmel,sama5d44"
43
44 * "atmel,samv7" for MCUs using a Cortex-M7, shall be extended with the specific
45 SoC family:
46 o "atmel,sams70" shall be extended with the specific MCU compatible:
47 - "atmel,sams70j19"
48 - "atmel,sams70j20"
49 - "atmel,sams70j21"
50 - "atmel,sams70n19"
51 - "atmel,sams70n20"
52 - "atmel,sams70n21"
53 - "atmel,sams70q19"
54 - "atmel,sams70q20"
55 - "atmel,sams70q21"
56 o "atmel,samv70" shall be extended with the specific MCU compatible:
57 - "atmel,samv70j19"
58 - "atmel,samv70j20"
59 - "atmel,samv70n19"
60 - "atmel,samv70n20"
61 - "atmel,samv70q19"
62 - "atmel,samv70q20"
63 o "atmel,samv71" shall be extended with the specific MCU compatible:
64 - "atmel,samv71j19"
65 - "atmel,samv71j20"
66 - "atmel,samv71j21"
67 - "atmel,samv71n19"
68 - "atmel,samv71n20"
69 - "atmel,samv71n21"
70 - "atmel,samv71q19"
71 - "atmel,samv71q20"
72 - "atmel,samv71q21"
73
74Chipid required properties:
75- compatible: Should be "atmel,sama5d2-chipid"
76- reg : Should contain registers location and length
77
78PIT Timer required properties:
79- compatible: Should be "atmel,at91sam9260-pit"
80- reg: Should contain registers location and length
81- interrupts: Should contain interrupt for the PIT which is the IRQ line
82 shared across all System Controller members.
83
84System Timer (ST) required properties:
85- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
86- reg: Should contain registers location and length
87- interrupts: Should contain interrupt for the ST which is the IRQ line
88 shared across all System Controller members.
89- clocks: phandle to input clock.
90Its subnodes can be:
91- watchdog: compatible should be "atmel,at91rm9200-wdt"
92
93TC/TCLIB Timer required properties:
94- compatible: Should be "atmel,<chip>-tcb".
95 <chip> can be "at91rm9200" or "at91sam9x5"
96- reg: Should contain registers location and length
97- interrupts: Should contain all interrupts for the TC block
98 Note that you can specify several interrupt cells if the TC
99 block has one interrupt per channel.
100- clock-names: tuple listing input clock names.
101 Required elements: "t0_clk", "slow_clk"
102 Optional elements: "t1_clk", "t2_clk"
103- clocks: phandles to input clocks.
104
105Examples:
106
107One interrupt per TC block:
108 tcb0: timer@fff7c000 {
109 compatible = "atmel,at91rm9200-tcb";
110 reg = <0xfff7c000 0x100>;
111 interrupts = <18 4>;
112 clocks = <&tcb0_clk>;
113 clock-names = "t0_clk";
114 };
115
116One interrupt per TC channel in a TC block:
117 tcb1: timer@fffdc000 {
118 compatible = "atmel,at91rm9200-tcb";
119 reg = <0xfffdc000 0x100>;
120 interrupts = <26 4 27 4 28 4>;
121 clocks = <&tcb1_clk>;
122 clock-names = "t0_clk";
123 };
124
125RSTC Reset Controller required properties:
126- compatible: Should be "atmel,<chip>-rstc".
127 <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
128- reg: Should contain registers location and length
129- clocks: phandle to input clock.
130
131Example:
132
133 rstc@fffffd00 {
134 compatible = "atmel,at91sam9260-rstc";
135 reg = <0xfffffd00 0x10>;
136 clocks = <&clk32k>;
137 };
138
139RAMC SDRAM/DDR Controller required properties:
140- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
141 "atmel,at91sam9260-sdramc",
142 "atmel,at91sam9g45-ddramc",
143 "atmel,sama5d3-ddramc",
144- reg: Should contain registers location and length
145
146Examples:
147
148 ramc0: ramc@ffffe800 {
149 compatible = "atmel,at91sam9g45-ddramc";
150 reg = <0xffffe800 0x200>;
151 };
152
153SHDWC Shutdown Controller
154
155required properties:
156- compatible: Should be "atmel,<chip>-shdwc".
157 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
158- reg: Should contain registers location and length
159- clocks: phandle to input clock.
160
161optional properties:
162- atmel,wakeup-mode: String, operation mode of the wakeup mode.
163 Supported values are: "none", "high", "low", "any".
164- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
165
166optional at91sam9260 properties:
167- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
168
169optional at91sam9rl properties:
170- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
171- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
172
173optional at91sam9x5 properties:
174- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
175
176Example:
177
178 shdwc@fffffd10 {
179 compatible = "atmel,at91sam9260-shdwc";
180 reg = <0xfffffd10 0x10>;
181 clocks = <&clk32k>;
182 };
183
184SHDWC SAMA5D2-Compatible Shutdown Controller
185
1861) shdwc node
187
188required properties:
189- compatible: should be "atmel,sama5d2-shdwc".
190- reg: should contain registers location and length
191- clocks: phandle to input clock.
192- #address-cells: should be one. The cell is the wake-up input index.
193- #size-cells: should be zero.
194
195optional properties:
196
197- debounce-delay-us: minimum wake-up inputs debouncer period in
198 microseconds. It's usually a board-related property.
199- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
200
201The node contains child nodes for each wake-up input that the platform uses.
202
2032) input nodes
204
205Wake-up input nodes are usually described in the "board" part of the Device
206Tree. Note also that input 0 is linked to the wake-up pin and is frequently
207used.
208
209Required properties:
210- reg: should contain the wake-up input index [0 - 15].
211
212Optional properties:
213- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
214 by the child, forces the wake-up of the core power supply on a high level.
215 The default is to be active low.
216
217Example:
218
219On the SoC side:
220 shdwc@f8048010 {
221 compatible = "atmel,sama5d2-shdwc";
222 reg = <0xf8048010 0x10>;
223 clocks = <&clk32k>;
224 #address-cells = <1>;
225 #size-cells = <0>;
226 atmel,wakeup-rtc-timer;
227 };
228
229On the board side:
230 shdwc@f8048010 {
231 debounce-delay-us = <976>;
232
233 input@0 {
234 reg = <0>;
235 };
236
237 input@1 {
238 reg = <1>;
239 atmel,wakeup-active-high;
240 };
241 };
242
243Special Function Registers (SFR)
244
245Special Function Registers (SFR) manage specific aspects of the integrated
246memory, bridge implementations, processor and other functionality not controlled
247elsewhere.
248
249required properties:
250- compatible: Should be "atmel,<chip>-sfr", "syscon" or
251 "atmel,<chip>-sfrbu", "syscon"
252 <chip> can be "sama5d3", "sama5d4" or "sama5d2".
253- reg: Should contain registers location and length
254
255 sfr@f0038000 {
256 compatible = "atmel,sama5d3-sfr", "syscon";
257 reg = <0xf0038000 0x60>;
258 };
259
260Security Module (SECUMOD)
261
262The Security Module macrocell provides all necessary secure functions to avoid
263voltage, temperature, frequency and mechanical attacks on the chip. It also
264embeds secure memories that can be scrambled
265
266required properties:
267- compatible: Should be "atmel,<chip>-secumod", "syscon".
268 <chip> can be "sama5d2".
269- reg: Should contain registers location and length
270
271 secumod@fc040000 {
272 compatible = "atmel,sama5d2-secumod", "syscon";
273 reg = <0xfc040000 0x100>;
274 };