tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __AMDGPU_UVD_H__
25#define __AMDGPU_UVD_H__
26
27#define AMDGPU_DEFAULT_UVD_HANDLES 10
28#define AMDGPU_MAX_UVD_HANDLES 40
29#define AMDGPU_UVD_STACK_SIZE (200*1024)
30#define AMDGPU_UVD_HEAP_SIZE (256*1024)
31#define AMDGPU_UVD_SESSION_SIZE (50*1024)
32#define AMDGPU_UVD_FIRMWARE_OFFSET 256
33
34struct amdgpu_uvd {
35 struct amdgpu_bo *vcpu_bo;
36 void *cpu_addr;
37 uint64_t gpu_addr;
38 unsigned fw_version;
39 void *saved_bo;
40 unsigned max_handles;
41 atomic_t handles[AMDGPU_MAX_UVD_HANDLES];
42 struct drm_file *filp[AMDGPU_MAX_UVD_HANDLES];
43 struct delayed_work idle_work;
44 const struct firmware *fw; /* UVD firmware */
45 struct amdgpu_ring ring;
46 struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS];
47 struct amdgpu_irq_src irq;
48 bool address_64_bit;
49 bool use_ctx_buf;
50 struct amd_sched_entity entity;
51 struct amd_sched_entity entity_enc;
52 uint32_t srbm_soft_reset;
53 unsigned num_enc_rings;
54};
55
56int amdgpu_uvd_sw_init(struct amdgpu_device *adev);
57int amdgpu_uvd_sw_fini(struct amdgpu_device *adev);
58int amdgpu_uvd_suspend(struct amdgpu_device *adev);
59int amdgpu_uvd_resume(struct amdgpu_device *adev);
60int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
61 struct dma_fence **fence);
62int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
63 bool direct, struct dma_fence **fence);
64void amdgpu_uvd_free_handles(struct amdgpu_device *adev,
65 struct drm_file *filp);
66int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx);
67void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring);
68void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring);
69int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout);
70uint32_t amdgpu_uvd_used_handles(struct amdgpu_device *adev);
71
72#endif