Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (c) 2014-2016, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU Lesser General Public License,
6 * version 2.1, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT ANY
9 * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
10 * FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for
11 * more details.
12 */
13#ifndef __NDCTL_H__
14#define __NDCTL_H__
15
16#include <linux/types.h>
17
18struct nd_cmd_smart {
19 __u32 status;
20 __u8 data[128];
21} __packed;
22
23#define ND_SMART_HEALTH_VALID (1 << 0)
24#define ND_SMART_SPARES_VALID (1 << 1)
25#define ND_SMART_USED_VALID (1 << 2)
26#define ND_SMART_TEMP_VALID (1 << 3)
27#define ND_SMART_CTEMP_VALID (1 << 4)
28#define ND_SMART_ALARM_VALID (1 << 9)
29#define ND_SMART_SHUTDOWN_VALID (1 << 10)
30#define ND_SMART_VENDOR_VALID (1 << 11)
31#define ND_SMART_SPARE_TRIP (1 << 0)
32#define ND_SMART_TEMP_TRIP (1 << 1)
33#define ND_SMART_CTEMP_TRIP (1 << 2)
34#define ND_SMART_NON_CRITICAL_HEALTH (1 << 0)
35#define ND_SMART_CRITICAL_HEALTH (1 << 1)
36#define ND_SMART_FATAL_HEALTH (1 << 2)
37
38struct nd_smart_payload {
39 __u32 flags;
40 __u8 reserved0[4];
41 __u8 health;
42 __u8 spares;
43 __u8 life_used;
44 __u8 alarm_flags;
45 __u16 temperature;
46 __u16 ctrl_temperature;
47 __u8 reserved1[15];
48 __u8 shutdown_state;
49 __u32 vendor_size;
50 __u8 vendor_data[92];
51} __packed;
52
53struct nd_cmd_smart_threshold {
54 __u32 status;
55 __u8 data[8];
56} __packed;
57
58struct nd_smart_threshold_payload {
59 __u8 alarm_control;
60 __u8 reserved0;
61 __u16 temperature;
62 __u8 spares;
63 __u8 reserved[3];
64} __packed;
65
66struct nd_cmd_dimm_flags {
67 __u32 status;
68 __u32 flags;
69} __packed;
70
71struct nd_cmd_get_config_size {
72 __u32 status;
73 __u32 config_size;
74 __u32 max_xfer;
75} __packed;
76
77struct nd_cmd_get_config_data_hdr {
78 __u32 in_offset;
79 __u32 in_length;
80 __u32 status;
81 __u8 out_buf[0];
82} __packed;
83
84struct nd_cmd_set_config_hdr {
85 __u32 in_offset;
86 __u32 in_length;
87 __u8 in_buf[0];
88} __packed;
89
90struct nd_cmd_vendor_hdr {
91 __u32 opcode;
92 __u32 in_length;
93 __u8 in_buf[0];
94} __packed;
95
96struct nd_cmd_vendor_tail {
97 __u32 status;
98 __u32 out_length;
99 __u8 out_buf[0];
100} __packed;
101
102struct nd_cmd_ars_cap {
103 __u64 address;
104 __u64 length;
105 __u32 status;
106 __u32 max_ars_out;
107 __u32 clear_err_unit;
108 __u16 flags;
109 __u16 reserved;
110} __packed;
111
112struct nd_cmd_ars_start {
113 __u64 address;
114 __u64 length;
115 __u16 type;
116 __u8 flags;
117 __u8 reserved[5];
118 __u32 status;
119 __u32 scrub_time;
120} __packed;
121
122struct nd_cmd_ars_status {
123 __u32 status;
124 __u32 out_length;
125 __u64 address;
126 __u64 length;
127 __u64 restart_address;
128 __u64 restart_length;
129 __u16 type;
130 __u16 flags;
131 __u32 num_records;
132 struct nd_ars_record {
133 __u32 handle;
134 __u32 reserved;
135 __u64 err_address;
136 __u64 length;
137 } __packed records[0];
138} __packed;
139
140struct nd_cmd_clear_error {
141 __u64 address;
142 __u64 length;
143 __u32 status;
144 __u8 reserved[4];
145 __u64 cleared;
146} __packed;
147
148struct nd_cmd_trans_spa {
149 __u64 spa;
150 __u32 status;
151 __u8 flags;
152 __u8 _reserved[3];
153 __u64 trans_length;
154 __u32 num_nvdimms;
155 struct nd_nvdimm_device {
156 __u32 nfit_device_handle;
157 __u32 _reserved;
158 __u64 dpa;
159 } __packed devices[0];
160
161} __packed;
162
163struct nd_cmd_ars_err_inj {
164 __u64 err_inj_spa_range_base;
165 __u64 err_inj_spa_range_length;
166 __u8 err_inj_options;
167 __u32 status;
168} __packed;
169
170struct nd_cmd_ars_err_inj_clr {
171 __u64 err_inj_clr_spa_range_base;
172 __u64 err_inj_clr_spa_range_length;
173 __u32 status;
174} __packed;
175
176struct nd_cmd_ars_err_inj_stat {
177 __u32 status;
178 __u32 inj_err_rec_count;
179 struct nd_error_stat_query_record {
180 __u64 err_inj_stat_spa_range_base;
181 __u64 err_inj_stat_spa_range_length;
182 } __packed record[0];
183} __packed;
184
185enum {
186 ND_CMD_IMPLEMENTED = 0,
187
188 /* bus commands */
189 ND_CMD_ARS_CAP = 1,
190 ND_CMD_ARS_START = 2,
191 ND_CMD_ARS_STATUS = 3,
192 ND_CMD_CLEAR_ERROR = 4,
193
194 /* per-dimm commands */
195 ND_CMD_SMART = 1,
196 ND_CMD_SMART_THRESHOLD = 2,
197 ND_CMD_DIMM_FLAGS = 3,
198 ND_CMD_GET_CONFIG_SIZE = 4,
199 ND_CMD_GET_CONFIG_DATA = 5,
200 ND_CMD_SET_CONFIG_DATA = 6,
201 ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
202 ND_CMD_VENDOR_EFFECT_LOG = 8,
203 ND_CMD_VENDOR = 9,
204 ND_CMD_CALL = 10,
205};
206
207enum {
208 ND_ARS_VOLATILE = 1,
209 ND_ARS_PERSISTENT = 2,
210 ND_ARS_RETURN_PREV_DATA = 1 << 1,
211 ND_CONFIG_LOCKED = 1,
212};
213
214static inline const char *nvdimm_bus_cmd_name(unsigned cmd)
215{
216 static const char * const names[] = {
217 [ND_CMD_ARS_CAP] = "ars_cap",
218 [ND_CMD_ARS_START] = "ars_start",
219 [ND_CMD_ARS_STATUS] = "ars_status",
220 [ND_CMD_CLEAR_ERROR] = "clear_error",
221 [ND_CMD_CALL] = "cmd_call",
222 };
223
224 if (cmd < ARRAY_SIZE(names) && names[cmd])
225 return names[cmd];
226 return "unknown";
227}
228
229static inline const char *nvdimm_cmd_name(unsigned cmd)
230{
231 static const char * const names[] = {
232 [ND_CMD_SMART] = "smart",
233 [ND_CMD_SMART_THRESHOLD] = "smart_thresh",
234 [ND_CMD_DIMM_FLAGS] = "flags",
235 [ND_CMD_GET_CONFIG_SIZE] = "get_size",
236 [ND_CMD_GET_CONFIG_DATA] = "get_data",
237 [ND_CMD_SET_CONFIG_DATA] = "set_data",
238 [ND_CMD_VENDOR_EFFECT_LOG_SIZE] = "effect_size",
239 [ND_CMD_VENDOR_EFFECT_LOG] = "effect_log",
240 [ND_CMD_VENDOR] = "vendor",
241 [ND_CMD_CALL] = "cmd_call",
242 };
243
244 if (cmd < ARRAY_SIZE(names) && names[cmd])
245 return names[cmd];
246 return "unknown";
247}
248
249#define ND_IOCTL 'N'
250
251#define ND_IOCTL_SMART _IOWR(ND_IOCTL, ND_CMD_SMART,\
252 struct nd_cmd_smart)
253
254#define ND_IOCTL_SMART_THRESHOLD _IOWR(ND_IOCTL, ND_CMD_SMART_THRESHOLD,\
255 struct nd_cmd_smart_threshold)
256
257#define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\
258 struct nd_cmd_dimm_flags)
259
260#define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\
261 struct nd_cmd_get_config_size)
262
263#define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\
264 struct nd_cmd_get_config_data_hdr)
265
266#define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\
267 struct nd_cmd_set_config_hdr)
268
269#define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR,\
270 struct nd_cmd_vendor_hdr)
271
272#define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\
273 struct nd_cmd_ars_cap)
274
275#define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START,\
276 struct nd_cmd_ars_start)
277
278#define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\
279 struct nd_cmd_ars_status)
280
281#define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\
282 struct nd_cmd_clear_error)
283
284#define ND_DEVICE_DIMM 1 /* nd_dimm: container for "config data" */
285#define ND_DEVICE_REGION_PMEM 2 /* nd_region: (parent of PMEM namespaces) */
286#define ND_DEVICE_REGION_BLK 3 /* nd_region: (parent of BLK namespaces) */
287#define ND_DEVICE_NAMESPACE_IO 4 /* legacy persistent memory */
288#define ND_DEVICE_NAMESPACE_PMEM 5 /* PMEM namespace (may alias with BLK) */
289#define ND_DEVICE_NAMESPACE_BLK 6 /* BLK namespace (may alias with PMEM) */
290#define ND_DEVICE_DAX_PMEM 7 /* Device DAX interface to pmem */
291
292enum nd_driver_flags {
293 ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM,
294 ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM,
295 ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK,
296 ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO,
297 ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM,
298 ND_DRIVER_NAMESPACE_BLK = 1 << ND_DEVICE_NAMESPACE_BLK,
299 ND_DRIVER_DAX_PMEM = 1 << ND_DEVICE_DAX_PMEM,
300};
301
302enum {
303 ND_MIN_NAMESPACE_SIZE = 0x00400000,
304};
305
306enum ars_masks {
307 ARS_STATUS_MASK = 0x0000FFFF,
308 ARS_EXT_STATUS_SHIFT = 16,
309};
310
311/*
312 * struct nd_cmd_pkg
313 *
314 * is a wrapper to a quasi pass thru interface for invoking firmware
315 * associated with nvdimms.
316 *
317 * INPUT PARAMETERS
318 *
319 * nd_family corresponds to the firmware (e.g. DSM) interface.
320 *
321 * nd_command are the function index advertised by the firmware.
322 *
323 * nd_size_in is the size of the input parameters being passed to firmware
324 *
325 * OUTPUT PARAMETERS
326 *
327 * nd_fw_size is the size of the data firmware wants to return for
328 * the call. If nd_fw_size is greater than size of nd_size_out, only
329 * the first nd_size_out bytes are returned.
330 */
331
332struct nd_cmd_pkg {
333 __u64 nd_family; /* family of commands */
334 __u64 nd_command;
335 __u32 nd_size_in; /* INPUT: size of input args */
336 __u32 nd_size_out; /* INPUT: size of payload */
337 __u32 nd_reserved2[9]; /* reserved must be zero */
338 __u32 nd_fw_size; /* OUTPUT: size fw wants to return */
339 unsigned char nd_payload[]; /* Contents of call */
340};
341
342/* These NVDIMM families represent pre-standardization command sets */
343#define NVDIMM_FAMILY_INTEL 0
344#define NVDIMM_FAMILY_HPE1 1
345#define NVDIMM_FAMILY_HPE2 2
346#define NVDIMM_FAMILY_MSFT 3
347
348#define ND_IOCTL_CALL _IOWR(ND_IOCTL, ND_CMD_CALL,\
349 struct nd_cmd_pkg)
350
351#endif /* __NDCTL_H__ */