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1#ifndef __ASM_SH_PGTABLE_3LEVEL_H
2#define __ASM_SH_PGTABLE_3LEVEL_H
3
4#define __ARCH_USE_5LEVEL_HACK
5#include <asm-generic/pgtable-nopud.h>
6
7/*
8 * Some cores need a 3-level page table layout, for example when using
9 * 64-bit PTEs and 4K pages.
10 */
11#define PAGETABLE_LEVELS 3
12
13#define PTE_MAGNITUDE 3 /* 64-bit PTEs on SH-X2 TLB */
14
15/* PGD bits */
16#define PGDIR_SHIFT 30
17
18#define PTRS_PER_PGD 4
19#define USER_PTRS_PER_PGD 2
20
21/* PMD bits */
22#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PTE_MAGNITUDE))
23#define PMD_SIZE (1UL << PMD_SHIFT)
24#define PMD_MASK (~(PMD_SIZE-1))
25
26#define PTRS_PER_PMD ((1 << PGDIR_SHIFT) / PMD_SIZE)
27
28#define pmd_ERROR(e) \
29 printk("%s:%d: bad pmd %016llx.\n", __FILE__, __LINE__, pmd_val(e))
30
31typedef struct { unsigned long long pmd; } pmd_t;
32#define pmd_val(x) ((x).pmd)
33#define __pmd(x) ((pmd_t) { (x) } )
34
35static inline unsigned long pud_page_vaddr(pud_t pud)
36{
37 return pud_val(pud);
38}
39
40#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
41static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
42{
43 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
44}
45
46#define pud_none(x) (!pud_val(x))
47#define pud_present(x) (pud_val(x))
48#define pud_clear(xp) do { set_pud(xp, __pud(0)); } while (0)
49#define pud_bad(x) (pud_val(x) & ~PAGE_MASK)
50
51/*
52 * (puds are folded into pgds so this doesn't get actually called,
53 * but the define is needed for a generic inline function.)
54 */
55#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
56
57#endif /* __ASM_SH_PGTABLE_3LEVEL_H */