tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * cros_ec_lpc_mec - LPC variant I/O for Microchip EC
3 *
4 * Copyright (C) 2016 Google, Inc
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * This driver uses the Chrome OS EC byte-level message-based protocol for
16 * communicating the keyboard state (which keys are pressed) from a keyboard EC
17 * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
18 * but everything else (including deghosting) is done here. The main
19 * motivation for this is to keep the EC firmware as simple as possible, since
20 * it cannot be easily upgraded and EC flash/IRAM space is relatively
21 * expensive.
22 */
23
24#include <linux/delay.h>
25#include <linux/io.h>
26#include <linux/mfd/cros_ec_commands.h>
27#include <linux/mfd/cros_ec_lpc_mec.h>
28#include <linux/mutex.h>
29#include <linux/types.h>
30
31/*
32 * This mutex must be held while accessing the EMI unit. We can't rely on the
33 * EC mutex because memmap data may be accessed without it being held.
34 */
35static struct mutex io_mutex;
36
37/*
38 * cros_ec_lpc_mec_emi_write_address
39 *
40 * Initialize EMI read / write at a given address.
41 *
42 * @addr: Starting read / write address
43 * @access_type: Type of access, typically 32-bit auto-increment
44 */
45static void cros_ec_lpc_mec_emi_write_address(u16 addr,
46 enum cros_ec_lpc_mec_emi_access_mode access_type)
47{
48 /* Address relative to start of EMI range */
49 addr -= MEC_EMI_RANGE_START;
50 outb((addr & 0xfc) | access_type, MEC_EMI_EC_ADDRESS_B0);
51 outb((addr >> 8) & 0x7f, MEC_EMI_EC_ADDRESS_B1);
52}
53
54/*
55 * cros_ec_lpc_io_bytes_mec - Read / write bytes to MEC EMI port
56 *
57 * @io_type: MEC_IO_READ or MEC_IO_WRITE, depending on request
58 * @offset: Base read / write address
59 * @length: Number of bytes to read / write
60 * @buf: Destination / source buffer
61 *
62 * @return 8-bit checksum of all bytes read / written
63 */
64u8 cros_ec_lpc_io_bytes_mec(enum cros_ec_lpc_mec_io_type io_type,
65 unsigned int offset, unsigned int length,
66 u8 *buf)
67{
68 int i = 0;
69 int io_addr;
70 u8 sum = 0;
71 enum cros_ec_lpc_mec_emi_access_mode access, new_access;
72
73 /*
74 * Long access cannot be used on misaligned data since reading B0 loads
75 * the data register and writing B3 flushes.
76 */
77 if (offset & 0x3 || length < 4)
78 access = ACCESS_TYPE_BYTE;
79 else
80 access = ACCESS_TYPE_LONG_AUTO_INCREMENT;
81
82 mutex_lock(&io_mutex);
83
84 /* Initialize I/O at desired address */
85 cros_ec_lpc_mec_emi_write_address(offset, access);
86
87 /* Skip bytes in case of misaligned offset */
88 io_addr = MEC_EMI_EC_DATA_B0 + (offset & 0x3);
89 while (i < length) {
90 while (io_addr <= MEC_EMI_EC_DATA_B3) {
91 if (io_type == MEC_IO_READ)
92 buf[i] = inb(io_addr++);
93 else
94 outb(buf[i], io_addr++);
95
96 sum += buf[i++];
97 offset++;
98
99 /* Extra bounds check in case of misaligned length */
100 if (i == length)
101 goto done;
102 }
103
104 /*
105 * Use long auto-increment access except for misaligned write,
106 * since writing B3 triggers the flush.
107 */
108 if (length - i < 4 && io_type == MEC_IO_WRITE)
109 new_access = ACCESS_TYPE_BYTE;
110 else
111 new_access = ACCESS_TYPE_LONG_AUTO_INCREMENT;
112
113 if (new_access != access ||
114 access != ACCESS_TYPE_LONG_AUTO_INCREMENT) {
115 access = new_access;
116 cros_ec_lpc_mec_emi_write_address(offset, access);
117 }
118
119 /* Access [B0, B3] on each loop pass */
120 io_addr = MEC_EMI_EC_DATA_B0;
121 }
122
123done:
124 mutex_unlock(&io_mutex);
125
126 return sum;
127}
128EXPORT_SYMBOL(cros_ec_lpc_io_bytes_mec);
129
130void cros_ec_lpc_mec_init(void)
131{
132 mutex_init(&io_mutex);
133}
134EXPORT_SYMBOL(cros_ec_lpc_mec_init);
135
136void cros_ec_lpc_mec_destroy(void)
137{
138 mutex_destroy(&io_mutex);
139}
140EXPORT_SYMBOL(cros_ec_lpc_mec_destroy);