tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Broadcom Starfighter2 private context
3 *
4 * Copyright (C) 2014, Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __BCM_SF2_H
13#define __BCM_SF2_H
14
15#include <linux/platform_device.h>
16#include <linux/kernel.h>
17#include <linux/io.h>
18#include <linux/spinlock.h>
19#include <linux/mutex.h>
20#include <linux/mii.h>
21#include <linux/ethtool.h>
22#include <linux/types.h>
23#include <linux/bitops.h>
24#include <linux/if_vlan.h>
25
26#include <net/dsa.h>
27
28#include "bcm_sf2_regs.h"
29#include "b53/b53_priv.h"
30
31struct bcm_sf2_hw_params {
32 u16 top_rev;
33 u16 core_rev;
34 u16 gphy_rev;
35 u32 num_gphy;
36 u8 num_acb_queue;
37 u8 num_rgmii;
38 u8 num_ports;
39 u8 fcb_pause_override:1;
40 u8 acb_packets_inflight:1;
41};
42
43#define BCM_SF2_REGS_NAME {\
44 "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb" \
45}
46
47#define BCM_SF2_REGS_NUM 6
48
49struct bcm_sf2_port_status {
50 unsigned int link;
51
52 struct ethtool_eee eee;
53};
54
55struct bcm_sf2_cfp_priv {
56 /* Mutex protecting concurrent accesses to the CFP registers */
57 struct mutex lock;
58 DECLARE_BITMAP(used, CFP_NUM_RULES);
59 unsigned int rules_cnt;
60};
61
62struct bcm_sf2_priv {
63 /* Base registers, keep those in order with BCM_SF2_REGS_NAME */
64 void __iomem *core;
65 void __iomem *reg;
66 void __iomem *intrl2_0;
67 void __iomem *intrl2_1;
68 void __iomem *fcb;
69 void __iomem *acb;
70
71 /* Register offsets indirection tables */
72 u32 type;
73 const u16 *reg_offsets;
74 unsigned int core_reg_align;
75
76 /* spinlock protecting access to the indirect registers */
77 spinlock_t indir_lock;
78
79 int irq0;
80 int irq1;
81 u32 irq0_stat;
82 u32 irq0_mask;
83 u32 irq1_stat;
84 u32 irq1_mask;
85
86 /* Backing b53_device */
87 struct b53_device *dev;
88
89 /* Mutex protecting access to the MIB counters */
90 struct mutex stats_mutex;
91
92 struct bcm_sf2_hw_params hw_params;
93
94 struct bcm_sf2_port_status port_sts[DSA_MAX_PORTS];
95
96 /* Mask of ports enabled for Wake-on-LAN */
97 u32 wol_ports_mask;
98
99 /* MoCA port location */
100 int moca_port;
101
102 /* Bitmask of ports having an integrated PHY */
103 unsigned int int_phy_mask;
104
105 /* Master and slave MDIO bus controller */
106 unsigned int indir_phy_mask;
107 struct device_node *master_mii_dn;
108 struct mii_bus *slave_mii_bus;
109 struct mii_bus *master_mii_bus;
110
111 /* Bitmask of ports needing BRCM tags */
112 unsigned int brcm_tag_mask;
113
114 /* CFP rules context */
115 struct bcm_sf2_cfp_priv cfp;
116};
117
118static inline struct bcm_sf2_priv *bcm_sf2_to_priv(struct dsa_switch *ds)
119{
120 struct b53_device *dev = ds->priv;
121
122 return dev->priv;
123}
124
125static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off)
126{
127 return off << priv->core_reg_align;
128}
129
130#define SF2_IO_MACRO(name) \
131static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off) \
132{ \
133 return __raw_readl(priv->name + off); \
134} \
135static inline void name##_writel(struct bcm_sf2_priv *priv, \
136 u32 val, u32 off) \
137{ \
138 __raw_writel(val, priv->name + off); \
139} \
140
141/* Accesses to 64-bits register requires us to latch the hi/lo pairs
142 * using the REG_DIR_DATA_{READ,WRITE} ancillary registers. The 'indir_lock'
143 * spinlock is automatically grabbed and released to provide relative
144 * atomiticy with latched reads/writes.
145 */
146#define SF2_IO64_MACRO(name) \
147static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off) \
148{ \
149 u32 indir, dir; \
150 spin_lock(&priv->indir_lock); \
151 dir = name##_readl(priv, off); \
152 indir = reg_readl(priv, REG_DIR_DATA_READ); \
153 spin_unlock(&priv->indir_lock); \
154 return (u64)indir << 32 | dir; \
155} \
156static inline void name##_writeq(struct bcm_sf2_priv *priv, u64 val, \
157 u32 off) \
158{ \
159 spin_lock(&priv->indir_lock); \
160 reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE); \
161 name##_writel(priv, lower_32_bits(val), off); \
162 spin_unlock(&priv->indir_lock); \
163}
164
165#define SWITCH_INTR_L2(which) \
166static inline void intrl2_##which##_mask_clear(struct bcm_sf2_priv *priv, \
167 u32 mask) \
168{ \
169 priv->irq##which##_mask &= ~(mask); \
170 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
171} \
172static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \
173 u32 mask) \
174{ \
175 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
176 priv->irq##which##_mask |= (mask); \
177} \
178
179static inline u32 core_readl(struct bcm_sf2_priv *priv, u32 off)
180{
181 u32 tmp = bcm_sf2_mangle_addr(priv, off);
182 return __raw_readl(priv->core + tmp);
183}
184
185static inline void core_writel(struct bcm_sf2_priv *priv, u32 val, u32 off)
186{
187 u32 tmp = bcm_sf2_mangle_addr(priv, off);
188 __raw_writel(val, priv->core + tmp);
189}
190
191static inline u32 reg_readl(struct bcm_sf2_priv *priv, u16 off)
192{
193 return __raw_readl(priv->reg + priv->reg_offsets[off]);
194}
195
196static inline void reg_writel(struct bcm_sf2_priv *priv, u32 val, u16 off)
197{
198 __raw_writel(val, priv->reg + priv->reg_offsets[off]);
199}
200
201SF2_IO64_MACRO(core);
202SF2_IO_MACRO(intrl2_0);
203SF2_IO_MACRO(intrl2_1);
204SF2_IO_MACRO(fcb);
205SF2_IO_MACRO(acb);
206
207SWITCH_INTR_L2(0);
208SWITCH_INTR_L2(1);
209
210/* RXNFC */
211int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port,
212 struct ethtool_rxnfc *nfc, u32 *rule_locs);
213int bcm_sf2_set_rxnfc(struct dsa_switch *ds, int port,
214 struct ethtool_rxnfc *nfc);
215int bcm_sf2_cfp_rst(struct bcm_sf2_priv *priv);
216
217#endif /* __BCM_SF2_H */